Problems with adapting 90nm G5's?
Greetings, I have been optimistically awaiting new PowerMacs; however, I am really concerned that there are issues at Apple or IBM that are holding things up. We ordered a G5 Xserve shortly after they were announced. Our shipping date was "on or before 3/31/04". Well, yesterday came and went, and our updating shipping date is "on or before 5/27/04"!
An additional 2 month delay (unless they get it out first).
So, this begs the question: why so many delays? Chip supply? System Controller issues (I don't see why as it could use the same as the PM G5 @ 2.0 GHz)?
Something is amiss, and presumably, it is what is delaying new Powermacs...
An additional 2 month delay (unless they get it out first).
So, this begs the question: why so many delays? Chip supply? System Controller issues (I don't see why as it could use the same as the PM G5 @ 2.0 GHz)?
Something is amiss, and presumably, it is what is delaying new Powermacs...
Comments
Apple has had the 90 nm chips for a long time and would have released the final prototypes before announcing the server. I don't think it is a problem of getting an engineering act together - if it was the server announcement would have been delayed.
I think this is also the reason why the 90 nm PM has not been announced.
Originally posted by atomicham
Greetings, I have been optimistically awaiting new PowerMacs; however, I am really concerned that there are issues at Apple or IBM that are holding things up. We ordered a G5 Xserve shortly after they were announced. Our shipping date was "on or before 3/31/04". Well, yesterday came and went, and our updating shipping date is "on or before 5/27/04"!
An additional 2 month delay (unless they get it out first).
So, this begs the question: why so many delays? Chip supply? System Controller issues (I don't see why as it could use the same as the PM G5 @ 2.0 GHz)?
Something is amiss, and presumably, it is what is delaying new Powermacs...
Let me put my pyschic hat on here....
Ok, you ordered a dual G5 Xserve didn't you?
(The amaizing karmac knows all, sees all.)
1) the next PM revision is all dual;
2) the dual-channel companion chip is the problem.
IBM recently said that their yields on their own designs were insanely high (~95%) but their yields on other peoples' designs were almost the inverse (~5%). Besides revealing that IBM's toolset needs just a wee bit more work, this might help explain the delay to some extent.
Of course, I don't think PMs will ship, until around the time that the PCI Express video accelerators start rolling out, unless Apple really isn't concerned about rolling out AGP hardware and falling 6 months behind the industry.
As Tomb of the Unknown says, this guy is probably waiting for a dual processor G5 Xserve which has been delayed till May. That delay was announced earlier this week.
Could be they haven't finished shipping dual G5 Xserves to Virginia Tech yet or Apple's manufacturers can't keep up to the motherboard demand.
Originally posted by Amorph
The dual Xserve is the one slipping, so I tentatively conclude that:
Bzzzzzzt. Wrong. Thanks for playing.
http://www.apple.com/pr/library/2004/mar/23xserve.html
Originally posted by Tomb of the Unknown
Bzzzzzzt. Wrong. Thanks for playing.
http://www.apple.com/pr/library/2004/mar/23xserve.html
Ooops. My bad, I thought you said the dual was the one "shipping" not "slipping".
Originally posted by Amorph
The dual Xserve is the one slipping, so I tentatively conclude that:
1) the next PM revision is all dual;
2) the dual-channel companion chip is the problem.
IBM recently said that their yields on their own designs were insanely high (~95%) but their yields on other peoples' designs were almost the inverse (~5%). Besides revealing that IBM's toolset needs just a wee bit more work, this might help explain the delay to some extent.
Of course, I don't think PMs will ship, until around the time that the PCI Express video accelerators start rolling out, unless Apple really isn't concerned about rolling out AGP hardware and falling 6 months behind the industry.
Is there really a difference in the companion chip between a dual CPU machine and a single? Aren't they the same on the 1.6 G5 as the 1.8 and 2.0? Remember they went to the dual 1.8 and I don't think it required a major change to the chip. In fact the boards are so similar between the two I really doubt there is a much of a difference. I believe this would be the case on the Xserves as well.
Also, I saw a link to some Apple documentation for the Xserves that said the Northbridge is still a 130 nanometer part. Therefore it has nothing to do with yields. I also don't think the next revision to the Powermacs will be that major. I think it will be essentially the same machine with just a faster CPU. The front end bus will still top out at 1 GHz but they will use a 3x multiplier for chip speed.
I wonder if the use of a faster chip with a slower bus resulted in a Mac that was not that much faster. For example, if Apple were using a 2.4 GHz 970fx with a 800 MHz bus it may not have been much faster than a 2.0 GHz one. Apple may have decided to wait for the 3GHz machine so they have an obvious speed advantage.
Remember too that the G5 Powermacs were a big investment for Apple and to think they can afford to radically change them this soon is not very practical.
Just my 2 cents.
Originally posted by Tomb of the Unknown
Let me put my pyschic hat on here....
Ok, you ordered a dual G5 Xserve didn't you?
(The amaizing karmac knows all, sees all.)
Oh, mighty karmac you are correct.
End of Line
Originally posted by User Tron
If there's a problem with the amount cpus available, wouldn't it be logical to sell the singles instead the duals? Apple could sell twice the amount of machines.
Since they list duals among the hardware they make, there are those freaks of people who order the duals. </sarcasm> There are certain environments/applications where you'd better have N dual Xserves for XK$ than 2N singles for 1.5xXK$.
Originally posted by Kurt
Is there really a difference in the companion chip between a dual CPU machine and a single? Aren't they the same on the 1.6 G5 as the 1.8 and 2.0? Remember they went to the dual 1.8 and I don't think it required a major change to the chip. In fact the boards are so similar between the two I really doubt there is a much of a difference. I believe this would be the case on the Xserves as well.
I don't actually know. That's why my conclusion was "tentative."
Also, I saw a link to some Apple documentation for the Xserves that said the Northbridge is still a 130 nanometer part. Therefore it has nothing to do with yields. I also don't think the next revision to the Powermacs will be that major. I think it will be essentially the same machine with just a faster CPU. The front end bus will still top out at 1 GHz but they will use a 3x multiplier for chip speed.
Or, the Xserve is using the 130nm part because it works for a 2GHz CPU and Apple had to ship something. But they'd hoped to ship with the 90nm part.
This is, of course, rampant speculation.
I wonder if the use of a faster chip with a slower bus resulted in a Mac that was not that much faster. For example, if Apple were using a 2.4 GHz 970fx with a 800 MHz bus it may not have been much faster than a 2.0 GHz one. Apple may have decided to wait for the 3GHz machine so they have an obvious speed advantage.
Remember too that the G5 Powermacs were a big investment for Apple and to think they can afford to radically change them this soon is not very practical.
Northbridges are characteristically much slower than CPUs. Apple is exceptional in shipping a controller that runs anywhere near the speed of the CPU, never mind one that's made on the same process.
Apple was probably hoping that a die shrink of the same basic part would be no big deal. I'm not expecting any radical change either, actually, but there are some things that point to last minute compromises in the design (of the case, primarily) that I think Apple will want to rectify. And if they're sharing a controller with Xserve they might want to think about making all four of those SATA channels available.
Originally posted by User Tron
If there's a problem with the amount cpus available, wouldn't it be logical to sell the singles instead the duals? Apple could sell twice the amount of machines.
End of Line
That sort of goes back to my original question. Are there issues with the CPU's or issues at Apple? If they are shipping singles and not duals, it doesn't necessarily point in any direction (unless Apple uses the same Northbridge chip for both, then it points toward IBM).
On another point to your statement, many people in the science community are having performance issues with the dual CPU G5's becoming memory starved (the dual G5's have only one memory controller). As good as the bandwidth is on the new G5's, a single CPU can saturate the bus (under particular modelling applications), starving the second CPU. The Xeons suffer similarly due to having a single controller. The new 64-bit AMD's on the other hand use separate memory controllers and do not suffer from this.
That being said, what people are finding is clustering single G5 machines is an excellent way to avoid this issue and get performance topping the AMD.
Unfortunately, Apple doesn't offer a single G5 Xserve computational node.
Fortunately, my modeling is CPU intensive without being memory intensive.
Originally posted by atomicham
As good as the bandwidth is on the new G5's, a single CPU can saturate the bus (under particular modelling applications), starving the second CPU.
I am not sure if I understand correctly what you are saying, but it appears that each processor has its own bus.
Originally posted by PB
I am not sure if I understand correctly what you are saying, but it appears that each processor has its own bus.
That is not just an appearance, it is an absolute truth that each CPU has its own FSB.
Xeons have a similar problem. But they share the same cpu bus as well, which just makes it worse. In the case of the G5 the memory bandwidth could be doubled ( eg: going to quad channel memory ). But in the case of the Xeon dong that is no help, because the cpu's still have to share a limited bus.
Opterons have the memory controller as part of the cpu, so each cpu has its own memory directly attached ( it is optional, cheap systems only have memory on one cpu ). This basically avoids the issues completely.
The G5 will move to an onboard memory controller, just as the Xeon will. It is the best way to approach the problem once you can afford it.
In the currently shipping Powermacs it appears that the single 1.6 and 1.8 are just dual machines without the socket for a second cpu ( it makes sense to do it that way to ). The logic board looks like it has all the bits in place for a second cpu, and I assume the northbridge ( system controller chip ) is the same as the dual cpu one. This makes chip validation easier, and production cheaper.
It is quite conceivable that the shift to 90nm has gone badly for the northbridge, but not so badly that Apple cant ship single cpu machines. It might be going a bit like this:
yields of good controllers are low, say 5% or less, making it impossible to ship dual machines in large numbers ( they are probably going to vtech ). But of the remaining 95% of the controllers that are bad, perhaps 50% actually have their malfunction in the logic for controlling one of the cpus. In this case Apple can still use the chip, but only in a single cpu machine. The single cpu xserves probably look just like a dual, but with the cpu installed on the working bus.
[EDIT]
In fact, it is quite feasible that the faulty bus works fine a slower speed, it may well be fine for a 1.6 or 1.8 ghz cpu. But because Apple is only shipping 2ghz xserves they have backed themselves into a corner. Only one bus is reaching the required speed. This is how speed binning works for other products ( some part of the chip starts to fail at a certain speed, so mark it lower ). Essentially this means that Apple are overclocking their 90nm system controller, interesting...
Originally posted by Tomb of the Unknown
Let me put my pyschic hat on here....
Ok, you ordered a dual G5 Xserve didn't you?
(The amaizing karmac knows all, sees all.)
...except how to spell...