TS: The 970MP is coming

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  • Reply 41 of 192
    boemaneboemane Posts: 311member
    Quote:

    Originally posted by kupan787

    I don't know what the author is refering to that they can't included it currently because of things like the GNU compiler. Last time I checked, Apple includes that, and they sell OS X. Maybe I am misunderstanding something...



    All that open source stuff isn't directly provided in MacOS X, its a part of Darwin, the underlying core of OS X, which is Open source. MacOS X can bee seen as an "add-on" to darwin, in the same way that KDE and Gnome are the window manager "add-on" to Linux distros.



    Personally, I think this is why Apple are providing Darwin as Open-Source - its a legal issue



    .:BoeManE.:
  • Reply 42 of 192
    powerdocpowerdoc Posts: 8,123member
    Quote:

    Originally posted by Whisper

    <waves hand around> OOOh OOOOOh I have a question!!</waves hand around>



    Does this mean that instead of have 2 2.5GHz chips running on two separate 1.25GHz busses, there'll be two 3GHz cores running on a single shared 1GHz bus? Cause I think that would be a downgrade. If the new bus is 2.5 times slower -- lets say 2 times slower because there's only one bus worth of overhead now -- that means that the CPUs can only process half as much data. IIRC a significant chunk of the G5's speed comes from its super sweet FSB, which this new version would lack.







    I don't think that the bus will be limited to 1 ghz, and even if it will not be a problem. Also remember, that the maximal level of performance of a computer (or a chain of elements) is the speed of the slowest part of it. Even if there is two 1,25 ghz bus, able to move 2*10 GB/sec, the main memory is limited to 6,4 GB/sec.

    The memory is the limitant factor of the design.

    Note also that the speed of the communication between the two chips is limited to 10 GB/sec with a huge latency (for the 2,5 ghz model). The communication between the two cores will be much faster (full speed and perhaps on 128 bits, rather than on 64) with much smaller latency.



    In resume, the two core design will be more efficient to move datas, and the huge 1 MB cache per core will help.
  • Reply 43 of 192
    whisperwhisper Posts: 735member
    Quote:

    Originally posted by Powerdoc

    I don't think that the bus will be limited to 1 ghz, and even if it will not be a problem. Also remember, that the maximal level of performance of a computer (or a chain of elements) is the speed of the slowest part of it. Even if there is two 1,25 ghz bus, able to move 2*10 GB/sec, the main memory is limited to 6,4 GB/sec.

    The memory is the limitant factor of the design.

    Note also that the speed of the communication between the two chips is limited to 10 GB/sec with a huge latency (for the 2,5 ghz model). The communication between the two cores will be much faster (full speed and perhaps on 128 bits, rather than on 64) with much smaller latency.



    In resume, the two core design will be more efficient to move datas, and the huge 1 MB cache per core will help.




    But doesn't the FSB have to feed the GPU (hopefully soon to be PCI-Express) and maybe some other stuff in addition to memory? Maybe my understanding of computer engineering is off here. Bus speed is something we're currently way better at, so it just seems like (assuming the leaked info is correct) we're losing a big advantage.
  • Reply 44 of 192
    powerdocpowerdoc Posts: 8,123member
    Quote:

    Originally posted by Whisper

    But doesn't the FSB have to feed the GPU (hopefully soon to be PCI-Express) and maybe some other stuff in addition to memory? Maybe my understanding of computer engineering is off here. Bus speed is something we're currently way better at, so it just seems like (assuming the leaked info is correct) we're losing a big advantage.



    Yes it's feed the GPU and others things, but for the moment a one ghz bus will be enough for this purpose. AGP 8 X only move 2 GB/sec. PCI express, will move twice in his first implementation, but Intel seems to face some problems with it : the first mobo are not shipped in the Intel world.



    Anyway, the 1Ghz bus is not sure (the 970 MP thing is also just a rumor, even if I give it some credits)
  • Reply 45 of 192
    aphelionaphelion Posts: 736member
    So might this latest rumor about a 970MP dual core finally lead to my long called for quad Mac?



    I'm tired of Apple trying to attain parity with Wintel (and AMD) systems. Even if you summon up the MHz-Myth and call the 2.5 970FX a "3200+" a-la AMD factoring (some would say "2999+"), it still is too close to call. The "worlds fastest personal computer" should be an unassailable claim.



    Apple needs to set a performance bar that clearly exceeds that of the rest of the personal computer industry. And they need to do it by a wide margin in every category, Not just Photoshop bake-off's, but SPEC scores, and every other conceivable benchmark. Cross platform applications must run significantly faster on the top end Macintosh, even those that are not well optimized for the Mac.



    To limit dual core chips to cheaper duals (or simply more margin) for the flagship towers would be unthinkable to me. A chance to dominate the high end for once must not be missed.



    ...
  • Reply 46 of 192
    henriokhenriok Posts: 537member
    Quote:

    Originally posted by @homenow

    I think that it goes without saying that if Apple's competators offer MP system using DC chips that Apple will have to do the same



    The competition offers quad systems _today_ and have for some time, but Apple is not doing anything about it. If cooling a single core Prescott is hard, then I ccan't imagine how hard it will be to cool a dual core, let alone two or even four dual core chips.
  • Reply 47 of 192
    lemon bon bonlemon bon bon Posts: 2,383member
    Quote:

    there'll be two 3GHz cores running on a single shared 1GHz bus?



    This is finally a chance to put the boot into the Wintel camp.



    It will majorly reduce the performance perception of all Apple's consumer desktops.



    Good thing TM.



    Two 3 gig cores. Nice.



    Dual that.



    Ouch time.



    'X' should absolutely fly on this beast. Not to mention a substantial boost to 3D and video rendering... And all of a sudden we'll have digital hub computer in the iMac 3G that can take anything that's thrown at it when the iMac 3G is updated with a dual core sometime late next year?







    I get the feeling that we've yet to see the best of PPC and the 'G5'.



    Dual Core will finally bring home the promise of PPC architecture.



    Yeesh, why's it taken so long?



    I hope Apple doesn't waist this opportunity to seize the advantage while the wintel family is behind...



    Lemon Bon Bon
  • Reply 48 of 192
    zapchudzapchud Posts: 844member
    Edit: Meh, responded to a question that had already been addressed.
  • Reply 49 of 192
    aphelionaphelion Posts: 736member
    Quote:

    Originally posted by Lemon Bon Bon

    ... "I hope Apple doesn't waist this opportunity to seize the advantage while the wintel family is behind"...



    Or while AMD is within reach!



    ...
  • Reply 50 of 192
    wwworkwwwork Posts: 140member
    But wouldn't IBM be losing money by selling 2 dual cores for the same price as 2 single cores?
  • Reply 51 of 192
    gamblorgamblor Posts: 446member
    Quote:

    Yes it's feed the GPU and others things, but for the moment a one ghz bus will be enough for this purpose. AGP 8 X only move 2 GB/sec. PCI express, will move twice in his first implementation, but Intel seems to face some problems with it : the first mobo are not shipped in the Intel world.



    Huh? Dell has machines shipping with PCI Express right now, and Newegg has PCI-E motherboards in stock.



    I think Whisper does have a point-- if you've got two processors fighting for bandwidth on a single channel, it's bound to slow things down, at least for some applications. I'd suspect it'd only really have an impact on the usual suspects (video editing, 3D modeling, etc.), but it wouldn't surprise me to see a measurable impact due to the bus sharing.



    On the other hand, with two cores on a single chip, new possibilities are opened up for communication between the cores, since you don't have those pesky problems with sending signals off chip. Does anybody have information about this? Obviously, the easiest thing to do would be to just stick another 1GHz Elastic Interconnect (Interface? Whatever its called) between the two cores... but that would be kinda boring. Could we see a much faster intrachip interconnect? EI at 3GHz, anyone?
  • Reply 52 of 192
    gamblorgamblor Posts: 446member
    Quote:

    But wouldn't IBM be losing money by selling 2 dual cores for the same price as 2 single cores?



    "How can we afford to sell two processors for the price of one? VOLUME, VOLUME, VOLUME."
  • Reply 53 of 192
    powermacg6powermacg6 Posts: 123member
    Any news on SMT (aka hyperthreading). 2 cores SMT = 4 virtual processors, 2 cpu = 8 virtual processors. The new longer pipelines could really benefit from SMT
  • Reply 54 of 192
    @homenow@homenow Posts: 998member
    Quote:

    Originally posted by wwwork

    But wouldn't IBM be losing money by selling 2 dual cores for the same price as 2 single cores?



    They probably won't sell them for the same price, at bare minimum there is the extra material involved in production of them. The size of the dual core according to the story is slightly more than that of the first generation of the 970, so I would imagine that the cost per chip will be slighty more than that of the original 970 which is still quite a bit less than the cost of two first gen 970's.
  • Reply 55 of 192
    programmerprogrammer Posts: 3,458member
    I suspect that the 1 GHz bus shared between two cores on a single chip is likely correct. This would explain the 1MB L2 per core. It might be a concession to heat/power consumption. I don't think it will be a big deal, however, as the 1 GHz bus is pretty damn fast and there are 2 in a 2 chip system.



    The GPU does not use the FSB. Apple has it connected via an AGP port on the memory controller and it normally goes directly to memory for its data. The AGP port will be replaced with PCIe port(s), or a HyperTransport bridge.
  • Reply 56 of 192
    shawkshawk Posts: 116member
    Perhaps someone could check on the current bus speeds proposed by IBM for this dual core part.



    As a side note, a comparison of the G5 water cooled heatsink assembly to the size of the four core Power 5 assembly might be interesting.
  • Reply 57 of 192
    That's 4MB's of total L2 cache, that's crazy. 1MB PER core... As for cooling, I think that the water system they have set up right now will do the trick. Just turn up the fans to get a coule more CFM's through the radiator.....



    What I want to see EARLY 2005



    Dual 3Ghz G5 (Dual Core)

    1GB DDR600 Ram (avalible now)

    160GB SATA HD

    Nvidia 6800Ultra DDL x16 PCIe

    SuperDrive (Dual Layer)

    $2999
  • Reply 58 of 192
    hmurchisonhmurchison Posts: 12,425member
    Quote:

    Originally posted by Altivec_2.0

    That's 4MB's of total L2 cache, that's crazy. 1MB PER core... As for cooling, I think that the water system they have set up right now will do the trick. Just turn up the fans to get a coule more CFM's through the radiator.....



    What I want to see EARLY 2005



    Dual 3Ghz G5 (Dual Core)

    1GB DDR600 Ram (avalible now)

    160GB SATA HD

    Nvidia 6800Ultra DDL x16 PCIe

    SuperDrive (Dual Layer)

    $2999




    Close..but you won't see a 6800 Ultra in the package for under $3k. If the bus is 1Ghz then DDR2 500 would suffice as the max upstream/downstream speed of the FSB would be 4GBps each way.



    Here's my ideal system.



    2 Socket 970MP(Quad processing)

    1GB of DDR2 500

    250 SATA HD 16MB buffer and NCQ on SATA II bus

    Nvidia GPU 256MB PCIe

    Superdrive (16x DVD-R, 4x DL)

    802.11g built in

    2 FW 400 and 800 bus each.

    4 USB2



    $3599
  • Reply 59 of 192
    @homenow@homenow Posts: 998member
    Quote:

    Originally posted by hmurchison

    Close..but you won't see a 6800 Ultra in the package for under $3k. If the bus is 1Ghz then DDR2 500 would suffice as the max upstream/downstream speed of the FSB would be 4GBps each way.



    Here's my ideal system.



    2 Socket 970MP(Quad processing)

    1GB of DDR2 500

    250 SATA HD 16MB buffer and NCQ on SATA II bus

    Nvidia GPU 256MB PCIe

    Superdrive (16x DVD-R, 4x DL)

    802.11g built in

    2 FW 400 and 800 bus each.

    4 USB2



    $3599




    Personally I could care less about the high end, I want to see a PM back at the $1499 or $1599 price, or better yet a replacement for the G4's that they have discontinued starting at $1299. That will do more for Apple's market share than a high end tower or another overpriced iMac.
  • Reply 60 of 192
    powerdocpowerdoc Posts: 8,123member
    IBM is not the only one to go dual. AMD and INTEL are taking the same way.

    Anyway there will be a big difference between the former and the two latters : X86 machines uses windowx and PPC machine use os X.



    It's not a secret that mac os X, is much more optmized for MP than X86 PC. Same will go for dual dual core computers (quad like computers). Granted to IBM, Apple has a future.
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