What do they mean with internal bus, do they mean (please no) the internal CPU bus that connects the core with the gigE, cache and such that isn't a part of the e600 dual core module? Or do they mean that for some reason unknown by man it's going to be used instead of RIO?
It's like the initial Intel dual core strategy. The two 74xx based cores are connected through an on-die MPX based bus, running at CPU clock rate, perhaps. Also on the MPX bus are a system controller the bridges on-die Ethernet, PCI/PCIe, RapidIO, I2S, I2C, memory controller, etc. Since the system bus is on-die at CPU clock rate (or half or third), it'll have plenty of bandwidth.
Using an on-die MPX bus for core to core communication is a good idea if Freescale wants to have the minimal investment for a dual core processor.
Quote:
Though Here they make it sound like it might use RIO:
7448 is just a typical 74xx CPU on the new 90 nm process.
PowerQuicc processors will have integrated memory controllers on-die and use RapidIO as the I/O interface. The dual core versions will use MPX on-die for communication between processors. Externally, will use RapidIO, and other IO (Ethernet, PCI/PCIe, etc).
What is a little mystifying is no mention of the ocean fabric used in the 8450/60 series, unless they are simply referring it as the system controller.
The ocean fabric doesn't appear to support cache coherency. There is a support cache coherency unit in the 85xx SoCs for instance.
MPX, the protocol, may very well be the avenue that Freescale takes for cache coherency but I can't see it full filling the promise of dual core technology. At least not as MPX the bus interface.
Quote:
It makes perfect sense. And have it on-chip means that can clock up to CPU clock rate or integer multiples. That'll be plenty of bandwidth.
I'd be very interested to hear how you can come to that conclusion. These on chip buses aren't know for running at high speeds anyways, to suggest that MPX can scale well is a bit of a stretch at this time.
The overwhelming good thing with repsect to this thread, is that in a few hours this should all be clear. The referenced article certainly wasn't!!!. I would suspect that any new offerings in the embedded world would extend what Freescale currently does. While not impossible considering Freescale, I would be surprised if they where to back slide as much as the article implied.
At this late stage of the night Freescale has yet to post anything to their web site. Geuss this means I have to catch up on things tommorrow. By the way anybody notice that Freescales web site sucks.
The ocean fabric doesn't appear to support cache coherency. There is a support cache coherency unit in the 85xx SoCs for instance.
Ah. That would be a problem.
Quote:
It makes perfect sense. And have it on-chip means that can clock up to CPU clock rate or integer multiples. That'll be plenty of bandwidth.
True. Without the need to run a significant distance over motherboard traces it should be able to go much faster.
Heck, they might even just be using the protocol. It scales to 256 bit [edit: I meant 128 bit...] bus widths, as I recall, and though that was never practical on a board it would be perfectly fine on a chip. It might not even be necessary.
Thanks for the reply. Now that you put it that way, it makes more sense. For some reason I was imagining MPX chugging away at 167MHz on die...
they're slowly but surely merging the 7400 line with the PowerQUICC embedded line.
I don't understand why they did it just half way. They changed the number to reflect PowerQUICC but they still calls them PowerPC. Why call them 8xxx at all if they arn't PowerQUICC? 7641 and 7641D would have made more sense, or the other way calling them PowerQUICC,
7448 does NOT include an on die memory controller, but ups the bus to 200 MHz
The internal MPX bus of the 8641D is clocked at 667 MHz
8641D does NOT draw more than 15W (!!)
8641D introduces to a new SMP/aSMP functionality someone else have to explain to me further. It seems to me that it can identify itselt as one processor to an application even if it is indeed two.
I don't understand why they did it just half way. They changed the number to reflect PowerQUICC but they still calls them PowerPC. Why call them 8xxx at all if they arn't PowerQUICC? 7641 and 7641D would have made more sense, or the other way calling them PowerQUICC,
7448 does NOT include an on die memory controller, but ups the bus to 200 MHz
The internal MPX bus of the 8641D is clocked at 667 MHz
8641D does NOT draw more than 15W (!!)
8641D introduces to a new SMP/aSMP functionality someone else have to explain to me further. It seems to me that it can identify itselt as one processor to an application even if it is indeed two.
As well as 1 MB L2 and improved altivec function...no doubt more info will be on the above site in the coming days. There are a number of links that don't work right now that may have more info as to when we can expect these improvements. If the EE times and The Register are anything to go by, its going to be another 6 months before we see the 7448/8641 and 12 months for the 'D'ual core version.
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
Any insight from MacPhisto as to how the folks at IBM are doing?
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
I agree somewhat. I find it hard to believe that IBM has anything that can counter the 8641D. Dual core at 1.5 GHz or more with almost everything but graphics on chip at just 15-25 W.. Thet'd be an awsome processor for portables.
PowerBook revs will be PowerTuned 970fx based. Why is it so hard to accept that fact.
Sure IBM doesn't have an announced dual-core chip for Apple but you can believe they are working on the next revisions of the POWER5-lite. Do you think they delivered the 970 and 970fx and all of a sudden just stopped developing for Apple? Come on!
First, IBM is trying aggressively to position the 970fx in the embedded market, so the fact that Freescale is also targeting the embedded market means nothing in the context of Apple CPUs. In particular, notebooks are embedded applications for all intents and purposes. Take one look at the MPC8641D and tell me that thing wouldn't run well in a Mac:
Quote:
The 8641D replicates more than the e600 [aka G4] core itself. The chip has two 1-Mbyte Level 2 caches and dual AltiVec vector-processing engines. Like the PowerQuicc, the 8641 (in both single and dual versions) turns the MPX bus into a fully internal bus for faster access between core processor and peripherals.
The on-die MPX bus runs at 667MHz.
Second, my own argument for a new PowerBook G4 assumed that a Freescale CPU was imminent, so that Apple could do a relatively quick and easy bump to the line while IBM got their low-voltage 970fx working. With the current timelines, I'm thinking they'd work well in an iBook or eMac or TBD small portable device. If a PowerBook appears with this tech, which couldn't happen until late next year, it will only be because IBM fumbled badly.
Except that the 8641D isn't pin compatible with current mobos (the 7448 is).
The 8641D isn't intended for computing, it's intended for embedded markets.
And the 8641D won't sample until the 2nd half '05.
And typical Moto... more than a year since the 1.5GHz 7447 and they've bumped...
100 MHz! Woot!!!
Welcome to the 90's again!
Please name one thing that would make the 8641 an unsuitable notebook chip.
Secondly, the 7448 uses 10W typical @ 1.4Ghz the 7447A uses 21W at the same clock. How is not that an improvement, aspecially concidering that the 7448 gets a 100% larger L2 cache and a ~20% faster fsb.
Not to mention that the .pdf I linked to shows that it's going to clock to "atleast" 1.5Ghz. (Looks like Freescale has leant the merit of being conservative in there preformance estimates)
Except that the 8641D isn't pin compatible with current mobos (the 7448 is).
No big deal. It'll be worth the trouble of a smaller, simpler and cheaper chipset and a RapidIO interface to move forward and get rid of MPX at the board level.
I'll put it this way: The 7448 is heading into legacy support, which is absolutely crucial for the embedded market but fairly uninteresting to the PC market. The RapidIO interface actually has a future.
Quote:
The 8641D isn't intended for computing, it's intended for embedded markets.
What CPU isn't intended for computing?
Laptops are embedded designs, for all intents and purposes. "Embedded" doesn't imply that little to no power is necessary (although that can be the case - Freescale still sells a line based on the 68k!), it implies that heat and power are real constraints.
Quote:
And the 8641D won't sample until the 2nd half '05.
Right. So Apple has until early '06 to design a RapidIO- and PCI Express- based motherboard for their low- to midrange portable designs. I think they can manage that.
Quote:
And typical Moto... more than a year since the 1.5GHz 7447 and they've bumped...
100 MHz! Woot!!!
They've also dropped the voltage and halved the wattage. Welcome to the new reality: the MHz wars are over, and it's all going to be about work per watt going forward. Witness the Pentium M.
In effect, everything will be done according to the embedded market's design rules, because the leakage and heat density problems at the 90nm node have forced the issue.
Please name one thing that would make the 8641 an unsuitable notebook chip.
Secondly, the 7448 uses 10W typical @ 1.4Ghz the 7447A uses 21W at the same clock. How is not that an improvement, aspecially concidering that the 7448 gets a 100% larger L2 cache and a ~20% faster fsb.
Not to mention that the .pdf I linked to shows that it's going to clock to "atleast" 1.5Ghz. (Looks like Freescale has leant the merit of being conservative in there preformance estimates)
Well if they shrunk the process from 130nm to 90nm and didn't lower power consumption at the same clock, they'd look like even bigger doofuses.
Perhaps prior experience with Moto "upgrades" (50MHz ?) has shaded my perspective.
I'll allow some of the more technically qualified hw folk to detail why else the 8641 might be unsuitable for notebook use, but die size and pinouts seem like a mobo-redesign-required hurdle to me. Especially if you've then got to do another mobo redesign for a 970FX anyway, likely ready around the same time.
And I may be mistaken, but I've always equated 'embedded' with 'standalone' in the sense of it being part of an engine controller, or embedded into a dedicated piece of kit which requires a single chip to include as much of the system as humanly possible. Perhaps because it will never get 'upgraded', or to mask the 'computing' behind a proverbial curtain.
In contrast, I've always separated 'computing' chips into an abstraction where additional functions will eventually be system-on-chip, but until specific functionality is required or customer requested, efficiency and a desire to avoid unnecessary complexity would mean 'cpu only' function and less integrated-everything-else-cause-there's-nowhere-else-to-put-it.
Perhaps this distinction is artificial and doomed to disappear in short order.
Certainly the modern chip includes some of what might have been 'embedded' components by previous measurement.
As well as 1 MB L2 and improved altivec function...no doubt more info will be on the above site in the coming days. There are a number of links that don't work right now that may have more info as to when we can expect these improvements. If the EE times and The Register are anything to go by, its going to be another 6 months before we see the 7448/8641 and 12 months for the 'D'ual core version.
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
Any insight from MacPhisto as to how the folks at IBM are doing?
The Freescale news is disappointing if the dates are accurate. I had expected the 7448 towards the end of the year with dual core designs hitting late spring/early summer next year. Like competitors in the industry, I thought FreeScale had gotten things together. I want to wait until FreeScale gives it presentation next month to see if we can get more news. The optimist in me is holding out hope until we get some official timetables from FreeScale.
As for IBM, I have not heard much lately. They are busy on SoC designs and multi-core 970s that are actually based on the POWER5, from what I understand. the .9 970FX is a priority and may be available early next year, though IBM engineers have been far more pessimistic as of late because they are still having 90nm problems. One of my friends has been pulling 50 hour plus weeks for quite a long time in efforts to fix issues. They've made significant progress, but may also have to push back 65nm - though they anticipate an easier transition there. They hope to have the SoC portable versions of the 970 chips ready to go for the summer next year, with the 970FX .9V launched before then. Last I heard, there was a chance of availability towards the end of the year, but I was told February was a more realistic month.
I personally think that things will get much better come January on the G5 Desktop front. There should be a bump with much faster, dual core processors as a strong possibility for the late summer/early fall. I had heard about cache increases, but I'm not too sure we'll see that in the next revision. The low voltage 970FX is supposed to have more L2 with some other refinements to increase speed even at the low voltage.
I think we will see dual-core PowerMacs and iMacs next year, maybe as early as summer. IBM may have dual-core, low voltage portable chips ready near that time too - but I think it's more likely those will come in January of 2006. IBM is still running behind where they thought they would be. Fortunately for Apple, much of the rest of the chip industry is running into problems as well.
Comments
Originally posted by Eric_Z
What do they mean with internal bus, do they mean (please no) the internal CPU bus that connects the core with the gigE, cache and such that isn't a part of the e600 dual core module? Or do they mean that for some reason unknown by man it's going to be used instead of RIO?
It's like the initial Intel dual core strategy. The two 74xx based cores are connected through an on-die MPX based bus, running at CPU clock rate, perhaps. Also on the MPX bus are a system controller the bridges on-die Ethernet, PCI/PCIe, RapidIO, I2S, I2C, memory controller, etc. Since the system bus is on-die at CPU clock rate (or half or third), it'll have plenty of bandwidth.
Using an on-die MPX bus for core to core communication is a good idea if Freescale wants to have the minimal investment for a dual core processor.
Though Here they make it sound like it might use RIO:
7448 is just a typical 74xx CPU on the new 90 nm process.
PowerQuicc processors will have integrated memory controllers on-die and use RapidIO as the I/O interface. The dual core versions will use MPX on-die for communication between processors. Externally, will use RapidIO, and other IO (Ethernet, PCI/PCIe, etc).
What is a little mystifying is no mention of the ocean fabric used in the 8450/60 series, unless they are simply referring it as the system controller.
Originally posted by Amorph
They have a perfectly good fabric in OCEAN...
The ocean fabric doesn't appear to support cache coherency. There is a support cache coherency unit in the 85xx SoCs for instance.
I can see MPX as a legacy bus, but on-chip?! That makes no sense to me.
It makes perfect sense. And have it on-chip means that can clock up to CPU clock rate or integer multiples. That'll be plenty of bandwidth.
Originally posted by THT
The ocean fabric doesn't appear to support cache coherency. There is a support cache coherency unit in the 85xx SoCs for instance.
MPX, the protocol, may very well be the avenue that Freescale takes for cache coherency but I can't see it full filling the promise of dual core technology. At least not as MPX the bus interface.
It makes perfect sense. And have it on-chip means that can clock up to CPU clock rate or integer multiples. That'll be plenty of bandwidth.
I'd be very interested to hear how you can come to that conclusion. These on chip buses aren't know for running at high speeds anyways, to suggest that MPX can scale well is a bit of a stretch at this time.
The overwhelming good thing with repsect to this thread, is that in a few hours this should all be clear. The referenced article certainly wasn't!!!. I would suspect that any new offerings in the embedded world would extend what Freescale currently does. While not impossible considering Freescale, I would be surprised if they where to back slide as much as the article implied.
At this late stage of the night Freescale has yet to post anything to their web site. Geuss this means I have to catch up on things tommorrow. By the way anybody notice that Freescales web site sucks.
Dave
Originally posted by THT
The ocean fabric doesn't appear to support cache coherency. There is a support cache coherency unit in the 85xx SoCs for instance.
Ah. That would be a problem.
It makes perfect sense. And have it on-chip means that can clock up to CPU clock rate or integer multiples. That'll be plenty of bandwidth.
True. Without the need to run a significant distance over motherboard traces it should be able to go much faster.
Heck, they might even just be using the protocol. It scales to 256 bit [edit: I meant 128 bit...] bus widths, as I recall, and though that was never practical on a board it would be perfectly fine on a chip. It might not even be necessary.
Thanks for the reply. Now that you put it that way, it makes more sense. For some reason I was imagining MPX chugging away at 167MHz on die...
Originally posted by Amorph
they're slowly but surely merging the 7400 line with the PowerQUICC embedded line.
I don't understand why they did it just half way. They changed the number to reflect PowerQUICC but they still calls them PowerPC. Why call them 8xxx at all if they arn't PowerQUICC? 7641 and 7641D would have made more sense, or the other way calling them PowerQUICC,
UPDATE
More info dirrectly from Freescale!
More than 1.5 GHz across the line
7448 is e600 based
7448 does NOT include an on die memory controller, but ups the bus to 200 MHz
The internal MPX bus of the 8641D is clocked at 667 MHz
8641D does NOT draw more than 15W (!!)
8641D introduces to a new SMP/aSMP functionality someone else have to explain to me further. It seems to me that it can identify itselt as one processor to an application even if it is indeed two.
Originally posted by Henriok
I don't understand why they did it just half way. They changed the number to reflect PowerQUICC but they still calls them PowerPC. Why call them 8xxx at all if they arn't PowerQUICC? 7641 and 7641D would have made more sense, or the other way calling them PowerQUICC,
UPDATE
More info dirrectly from Freescale!
More than 1.5 GHz across the line
7448 is e600 based
7448 does NOT include an on die memory controller, but ups the bus to 200 MHz
The internal MPX bus of the 8641D is clocked at 667 MHz
8641D does NOT draw more than 15W (!!)
8641D introduces to a new SMP/aSMP functionality someone else have to explain to me further. It seems to me that it can identify itselt as one processor to an application even if it is indeed two.
As well as 1 MB L2 and improved altivec function...no doubt more info will be on the above site in the coming days. There are a number of links that don't work right now that may have more info as to when we can expect these improvements. If the EE times and The Register are anything to go by, its going to be another 6 months before we see the 7448/8641 and 12 months for the 'D'ual core version.
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
Any insight from MacPhisto as to how the folks at IBM are doing?
Originally posted by a j stev
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
I agree somewhat. I find it hard to believe that IBM has anything that can counter the 8641D. Dual core at 1.5 GHz or more with almost everything but graphics on chip at just 15-25 W.. Thet'd be an awsome processor for portables.
PowerBook revs will be PowerTuned 970fx based. Why is it so hard to accept that fact.
Sure IBM doesn't have an announced dual-core chip for Apple but you can believe they are working on the next revisions of the POWER5-lite. Do you think they delivered the 970 and 970fx and all of a sudden just stopped developing for Apple? Come on!
The 8641D replicates more than the e600 [aka G4] core itself. The chip has two 1-Mbyte Level 2 caches and dual AltiVec vector-processing engines. Like the PowerQuicc, the 8641 (in both single and dual versions) turns the MPX bus into a fully internal bus for faster access between core processor and peripherals.
The on-die MPX bus runs at 667MHz.
Second, my own argument for a new PowerBook G4 assumed that a Freescale CPU was imminent, so that Apple could do a relatively quick and easy bump to the line while IBM got their low-voltage 970fx working. With the current timelines, I'm thinking they'd work well in an iBook or eMac or TBD small portable device. If a PowerBook appears with this tech, which couldn't happen until late next year, it will only be because IBM fumbled badly.
8641D Factsheet
Originally posted by Amorph
If a PowerBook appears with this tech, which couldn't happen until late next year, it will only be because IBM fumbled badly.
Agreed! I doubt IBM would drop the ball, as you said, that badly, but I guess what Jobs said about "keeping options open" certainly would apply.
Originally posted by Eric_Z
7448 Factsheet
8641D Factsheet
Except that the 8641D isn't pin compatible with current mobos (the 7448 is).
The 8641D isn't intended for computing, it's intended for embedded markets.
And the 8641D won't sample until the 2nd half '05.
And typical Moto... more than a year since the 1.5GHz 7447 and they've bumped...
100 MHz! Woot!!!
Welcome to the 90's again!
Originally posted by curiousuburb
Except that the 8641D isn't pin compatible with current mobos (the 7448 is).
The 8641D isn't intended for computing, it's intended for embedded markets.
And the 8641D won't sample until the 2nd half '05.
And typical Moto... more than a year since the 1.5GHz 7447 and they've bumped...
100 MHz! Woot!!!
Welcome to the 90's again!
Please name one thing that would make the 8641 an unsuitable notebook chip.
Secondly, the 7448 uses 10W typical @ 1.4Ghz the 7447A uses 21W at the same clock. How is not that an improvement, aspecially concidering that the 7448 gets a 100% larger L2 cache and a ~20% faster fsb.
Not to mention that the .pdf I linked to shows that it's going to clock to "atleast" 1.5Ghz. (Looks like Freescale has leant the merit of being conservative in there preformance estimates)
Originally posted by curiousuburb
Except that the 8641D isn't pin compatible with current mobos (the 7448 is).
No big deal. It'll be worth the trouble of a smaller, simpler and cheaper chipset and a RapidIO interface to move forward and get rid of MPX at the board level.
I'll put it this way: The 7448 is heading into legacy support, which is absolutely crucial for the embedded market but fairly uninteresting to the PC market. The RapidIO interface actually has a future.
The 8641D isn't intended for computing, it's intended for embedded markets.
What CPU isn't intended for computing?
Laptops are embedded designs, for all intents and purposes. "Embedded" doesn't imply that little to no power is necessary (although that can be the case - Freescale still sells a line based on the 68k!), it implies that heat and power are real constraints.
And the 8641D won't sample until the 2nd half '05.
Right. So Apple has until early '06 to design a RapidIO- and PCI Express- based motherboard for their low- to midrange portable designs. I think they can manage that.
And typical Moto... more than a year since the 1.5GHz 7447 and they've bumped...
100 MHz! Woot!!!
They've also dropped the voltage and halved the wattage. Welcome to the new reality: the MHz wars are over, and it's all going to be about work per watt going forward. Witness the Pentium M.
In effect, everything will be done according to the embedded market's design rules, because the leakage and heat density problems at the 90nm node have forced the issue.
Originally posted by Eric_Z
Please name one thing that would make the 8641 an unsuitable notebook chip.
Secondly, the 7448 uses 10W typical @ 1.4Ghz the 7447A uses 21W at the same clock. How is not that an improvement, aspecially concidering that the 7448 gets a 100% larger L2 cache and a ~20% faster fsb.
Not to mention that the .pdf I linked to shows that it's going to clock to "atleast" 1.5Ghz. (Looks like Freescale has leant the merit of being conservative in there preformance estimates)
Well if they shrunk the process from 130nm to 90nm and didn't lower power consumption at the same clock, they'd look like even bigger doofuses.
Perhaps prior experience with Moto "upgrades" (50MHz ?) has shaded my perspective.
I'll allow some of the more technically qualified hw folk to detail why else the 8641 might be unsuitable for notebook use, but die size and pinouts seem like a mobo-redesign-required hurdle to me. Especially if you've then got to do another mobo redesign for a 970FX anyway, likely ready around the same time.
And I may be mistaken, but I've always equated 'embedded' with 'standalone' in the sense of it being part of an engine controller, or embedded into a dedicated piece of kit which requires a single chip to include as much of the system as humanly possible. Perhaps because it will never get 'upgraded', or to mask the 'computing' behind a proverbial curtain.
In contrast, I've always separated 'computing' chips into an abstraction where additional functions will eventually be system-on-chip, but until specific functionality is required or customer requested, efficiency and a desire to avoid unnecessary complexity would mean 'cpu only' function and less integrated-everything-else-cause-there's-nowhere-else-to-put-it.
Perhaps this distinction is artificial and doomed to disappear in short order.
Certainly the modern chip includes some of what might have been 'embedded' components by previous measurement.
I'm open to correction on this.
They've also dropped
Dead? Promises of Vaporware?
Leave it there.
They're the dead horse of cpus.
Lemon Bon Bon
Originally posted by a j stev
As well as 1 MB L2 and improved altivec function...no doubt more info will be on the above site in the coming days. There are a number of links that don't work right now that may have more info as to when we can expect these improvements. If the EE times and The Register are anything to go by, its going to be another 6 months before we see the 7448/8641 and 12 months for the 'D'ual core version.
Not this matters much...if IBM gets its act together within the next 6 months with the 970FX at 0.9v, Freescale will be missing the boat...just like its parent company Moto.
Any insight from MacPhisto as to how the folks at IBM are doing?
The Freescale news is disappointing if the dates are accurate. I had expected the 7448 towards the end of the year with dual core designs hitting late spring/early summer next year. Like competitors in the industry, I thought FreeScale had gotten things together. I want to wait until FreeScale gives it presentation next month to see if we can get more news. The optimist in me is holding out hope until we get some official timetables from FreeScale.
As for IBM, I have not heard much lately. They are busy on SoC designs and multi-core 970s that are actually based on the POWER5, from what I understand. the .9 970FX is a priority and may be available early next year, though IBM engineers have been far more pessimistic as of late because they are still having 90nm problems. One of my friends has been pulling 50 hour plus weeks for quite a long time in efforts to fix issues. They've made significant progress, but may also have to push back 65nm - though they anticipate an easier transition there. They hope to have the SoC portable versions of the 970 chips ready to go for the summer next year, with the 970FX .9V launched before then. Last I heard, there was a chance of availability towards the end of the year, but I was told February was a more realistic month.
I personally think that things will get much better come January on the G5 Desktop front. There should be a bump with much faster, dual core processors as a strong possibility for the late summer/early fall. I had heard about cache increases, but I'm not too sure we'll see that in the next revision. The low voltage 970FX is supposed to have more L2 with some other refinements to increase speed even at the low voltage.
I think we will see dual-core PowerMacs and iMacs next year, maybe as early as summer. IBM may have dual-core, low voltage portable chips ready near that time too - but I think it's more likely those will come in January of 2006. IBM is still running behind where they thought they would be. Fortunately for Apple, much of the rest of the chip industry is running into problems as well.