Ok Nr9... I think its time to lay down your account at AI...
Since you are so confident in your statement (belittled with evidence), we should make a little wager.
If Powermacs don't crawl so much of a hertz within the next year, you win.... and we'll never question you again.
However, If it does jump... lets say from 2.5ghz to 2.8ghz... (whatever speed)... then your ip gets put on a deny for an access list. Still have the same confidence in your statement?
Basically, there is two way of creating more powerful chips :
- increase clock speed
- add more power per clock cycle.
Increasing clock speed, is managed through smaller and more efficient fabbing process, and refined design, like higher pipelining (wich recquiere more transistors).
add more power per clock cycle was done by (it's an oversimplification) adding more transistors. At first the chip where 8 bits, and a simple multiplication recquiered several cycles, then the chip went 16 bits, and more. The architecture of the chip become hyperscalar (many units sharing the work).
Nowdays a modern chip is hyperscalar, have a SIMD unit, is 64 bits. Let's say it short : single core CPU have reach their limit of sophistication. Adding twice the number of sub unit, won't produce twice the amount of performance, and going to 128 bits is totally wortless.
The only way to use more transistors in an efficient way is to go multicore. Heat density has reach a critical issue, and the optimum die size for a CPU according to IBM is 100 square millimeters.
The future is clearly multi, but it does not necessary mean that the clock speed are freeze forever. It just means that the mhz race is over, and it's a real good new for Apple who have never been big on it.
It's not just communication. Well educated people seldom make obvious technical mistakes, especially within their field. When they do err, they are quick to recognize it when someone points it out. I see neither of these characteristics in our friend.
Simply put, the clockspeed walls are due to the number of pipelines,
a 31 stage Prescott P4 at 4.0GHZ = 129Mhz per stage (90nm)
a 14(?)stage PPC970 at 2.5 GHZ = 178.5Mhz per stage (90nm)
compare this to
a four stage G4 (7400) at 600 Mhz = 150Mhz per stage (180nm)
a seven stage G4 (7447) at 1.5 Ghz = 214Mhz per stage (130nm)
a 12 stage Athlon 64 at 2.4 ghz = 200Mhz per stage (130nm)
a 20 stage Northwood P4 at 3.2 Ghz = 160Mhz per stage (130nm)
it would appear simplistically that we are approaching the limits already, except Intel who have dropped the ball. Getting 200Mhz per stage is doing extremely well. So I go wih Nr9 and Programmer
Thank you for that thought provoking reply. I understand general science and physics, but have very little knowledge about the inner workings of a CPU. I may have to study this subject to see how it affects the 90nm issue. I've noticed that the number of stages relates to the maximum clock speed, but this is true for any size process used in the past. The 90nm process hit us with a new problem, higher than anticipated leakage current. So, in a way, we are talking about two separate "walls" so to speak, but I do realize they may be very much interdependent. I wish I had time to study this right now.
It seems the new leakage current is due to the extremely thin separation between parts of the transistor at 90nm. It doesn't do the job of isolation that it does in larger processes. As the voltage increases this leakage goes us very rapidly, and voltage must to increased to get to higher clock speeds. If the Intel CPU architecture somehow allows a higher clock rate at lower voltages than IBM's architecture, this would explain the different limits, 2.5GHz and 4GHz. Otherwise, I'm not sure. It'll have to wait until I learn a bit more.
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Quote:
Originally posted by Nr9
it solves it because it is twice the area hence easier to cool.
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
If the Intel CPU architecture somehow allows a higher clock rate at lower voltages than IBM's architecture, this would explain the different limits, 2.5GHz and 4GHz. Otherwise, I'm not sure. It'll have to wait until I learn a bit more.
Im no expert. Ive generally read all the CPU theory at Arstechnica, and there is a good article there at the moment. www.arstechnica.com they've redesigned their site today, so I dont have a clue where everything has gone now
My analysis is something I've worked out on my own, I don't know how well it analogizes the real world, but I can definately see some correlations. Also I dont see that Intel chips run at a drastically lower voltage than anyone else. The speed comes from massive pipelines and managed heat dissipation
Re:THT "mature fab issues" - exactly why I say Intel have dropped the ball -It appears they could go much faster but they can not. And consider I said 'approaching the limits'-
That means I fully expect IBM to knock out 3Ghz 970's on a mature process. That will give
14 stage 970 at 3.0 Ghz = 214Mhz per stage (doing really well)
14 stage 970 at 3.5 Ghz = 250Mhz per stage (exceptional fabbing but a bit unlikely)
I honestly cannot see them getting better than this, because I havn't found evidence of any processor scaling this well on any process.
This is hardly earth shattering stuff, but welcome nonetheless. The limits are quite clear and easy to see. Dual Core is obviously the answer. Going from 2.5 on an early 90nm process to 3.5 Ghz on a mature 90nm process is 40% improvement. This contrasts to the 130nm processors which have all seen greater than 100% gains in speed. Scaling is dying. Even IBM admitted it.
Re:THT "mature fab issues" - exactly why I say Intel have dropped the ball -It appears they could go much faster but they can not.
I honestly cannot see them getting better than this, because I havn't found evidence of any processor scaling this well on any process.
The 65 nm node is expected to be doable, before quantum effects makes CMOS processes unmanageable. An order of magnitude challenge over 90 nm, but doable. I would expect another nontrivial increase in MHz from it.
As for Intel, they simply just haven't bit the bullet and implemented a high performance cooling system on a mass production scale. Seriously for a minute, higher heat doesn't mean the end of scaling for this business, it could simply mean higher performance cooling and using more electricity. This has been the answer for the last decade for both desktops and laptops.
Quote:
This is hardly earth shattering stuff, but welcome nonetheless. The limits are quite clear and easy to see. Dual Core is obviously the answer.
No doubt. But clock rate scaling is still there for a little while longer, including clock rate scaling on multi-core processors. After that, perhaps, CPUs will have different clock rates for different parts of the processor that will clock even higher. But yeah, we all agree that CMOS based computing devices are nearing the end with only 2 (give or take) nodes left milk, before quantum effects become unmanageable.
Quote:
Going from 2.5 on an early 90nm process to 3.5 Ghz on a mature 90nm process is 40% improvement. This contrasts to the 130nm processors which have all seen greater than 100% gains in speed. Scaling is dying. Even IBM admitted it.
I'm not liking the way you count. The 1st 90 nm 970fx processor was 2 GHz (for Xserves), which matched the top end for the 130 nm process, unless you think IBM could have shipped a 2.5 GHz 130 nm 970? (I think IBM probably could have shipped 2.4 GHz or so with strained silicon and low-k at 130 nm, actually. Would have been hot though.)
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
You double the transistors, but lower the frequency. In the end, there's a pretty big benefit, thermally, since you end up using less than half the power. (non-linear scaling)
I'm not liking the way you count. The 1st 90 nm 970fx processor was 2 GHz (for Xserves), which matched the top end for the 130 nm process, unless you think IBM could have shipped a 2.5 GHz 130 nm 970? (I think IBM probably could have shipped 2.4 GHz or so with strained silicon and low-k at 130 nm, actually. Would have been hot though.)
Personally I dont think 65nm will yield any significant gains in speed. I think it will allow dual cores to be as inexpensive to manufacture as single core 90nm. The heat wont drop, or the speed increase much, and unless there is some wierd quantum effect that only manifests itself at 90nm, i think the 65nm node will be a real bitch to perfect.
I knew you wouldn't like the way I count, but I excluded 2.0 ghz because
a) this speed was already reached by the 130nm process, where as other process shrinks generally allow a speed increase or drastic heat reduction. 90nm did not, so the 2.5ghz chips are the first that can be attributed to the improvement of shrinking the die to 90nm.
b) IBM's supply of 2.0ghz 90nm 970's was obviously the pre-production test of the process for the xServe for at least 6 months.
But they aren't noisy likey Wintel/AMD machines. They run quieter. Part of the Apple 'ethos' mentioned earlier.
Yields or noise politics aside...is it so much of a stretch that 2.6, 2.8 or 3 gig chips are far away? On a mature 0.09 fab?
The AMD/Wintel mhz race took us this far. Futher than I expected for years. I thought Intel was going to milk the 700mhz upto 1 gig ramp for years. AMD pushed them all the way for a while.
The mighty champ of 'mhz' is calling its chips numbers which have no resemblence to 'speed numbers' anymore. Sign of times.
So, a G5 in that context sounds like a real competitor!
Still, a 3 gig 970fx...dual core against a Prescott limping to 4 gig sounds a real performer. Surely a gig of that Prescott is flab from an old champ about to get his head caved in.
Look at benches on Tomshardware for AMD/Intel chips. The 'mhz' may seem impressive...but look at benches on Lightwave, Cinema and Max and you'll see mere seconds between a 3 gig chip and a '3.8' gig chip.
3-5% increments of performance advantage. For which you pay huge 100% price premiums over a chip a mere few speed grades down!
In that context, the dual 2.5 gig G5 with 1.25 gig bus seems like a powerhouse of a good deal (stingy ram and graphic card aside...)
As we go to dual-core...it seems PPC is going into the next round of bump grades with horse shoes in its boxing gloves...
...fighting the next performance war on its own turf?
Home advantage?
Lemon Bon Bon
I think we're only going to get significant improvements in the near future by going parallel. Dual core it is. I'll take that over a 25% linear bump to 3 gig.
I'd like both...come on PPC...you can make it...3 gig...3gig...3 gig...
You double the transistors, but lower the frequency. In the end, there's a pretty big benefit, thermally, since you end up using less than half the power. (non-linear scaling)
Just a comment -- IBM is currently working on dual a core versions of the 970FX, with enhancements. That is if we can believe some web sites, but there is documented evidence. I would not expect IBM to lower the clock rate for this 970MP, but they might.
Putting that aside, I simply responded to the claim that because a dual core is twice the area it is therefore easier to cool. This statement is not true. There was no provision that we lower frequency at the same time.
I agree on the benefits of adding a second core now that we are at 90nm. It's likely impossible to get that same performance boost by running at higher frequency because of the extreme power dissipation. Going multi core at 90nm is simply taking the path of least resistance to a performance boost.
I tend to stand with Lemon Bon Bon on the speed issue comparisons if all 3 camps are at a stand still, all Apple needs to do is start to compete better with graphics card options to look as good if not possibly better than it competitors.
THere is an obvious problem with the OpenGL coming from Apple. Fixing that alone would boost current G5 #'s a bit, but getting the whole driver problems worked out could leave PowerMac;s looking pretty good (in 3D performance tests) now.
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
eh wahtever you think
obviously it was with respect to the alternative, which is a faster single core
obviously it was with respect to the alternative, which is a faster single core
Do I detect a slightly milder Nr9? I can accept your explanation, but I only had your words to go by, which appears to be two independent reasons for going dual core. The first one is wrong and the second one is correct. It takes a lot of mental gymnastics for the reader to see the other meaning you had in mind.
Quote:
Originally posted by Nr9
it solves it because it is twice the area hence easier to cool. Also, you don't have to drive the voltage up(which you have to do if you want to up the frequency instead) power is proportional to voltage ^2 so that matters a lot ...
Let me try to say what I think you meant: Increasing performance by increasing clock rate means we keep the same chip size, but increase power greatly. This is really hard or impossible to cool. By going dual core, power goes up but so does chip size. Also, the power increase with a dual core is less than with a boost in clock frequency.
As one engineer to another, the most valuable thing I learned was to communicate better. I had to take what was jokingly called dumbbell English at the university. For years I worked on improving my communication skills, which do not come naturally for me, but the effort is worth it, and it is not a finished work. I am constantly trying to improve, to say things better and get my point across more easily and clearly.
Comments
Since you are so confident in your statement (belittled with evidence), we should make a little wager.
If Powermacs don't crawl so much of a hertz within the next year, you win.... and we'll never question you again.
However, If it does jump... lets say from 2.5ghz to 2.8ghz... (whatever speed)... then your ip gets put on a deny for an access list. Still have the same confidence in your statement?
- increase clock speed
- add more power per clock cycle.
Increasing clock speed, is managed through smaller and more efficient fabbing process, and refined design, like higher pipelining (wich recquiere more transistors).
add more power per clock cycle was done by (it's an oversimplification) adding more transistors. At first the chip where 8 bits, and a simple multiplication recquiered several cycles, then the chip went 16 bits, and more. The architecture of the chip become hyperscalar (many units sharing the work).
Nowdays a modern chip is hyperscalar, have a SIMD unit, is 64 bits. Let's say it short : single core CPU have reach their limit of sophistication. Adding twice the number of sub unit, won't produce twice the amount of performance, and going to 128 bits is totally wortless.
The only way to use more transistors in an efficient way is to go multicore. Heat density has reach a critical issue, and the optimum die size for a CPU according to IBM is 100 square millimeters.
The future is clearly multi, but it does not necessary mean that the clock speed are freeze forever. It just means that the mhz race is over, and it's a real good new for Apple who have never been big on it.
Originally posted by snoopy
It's not just communication. Well educated people seldom make obvious technical mistakes, especially within their field. When they do err, they are quick to recognize it when someone points it out. I see neither of these characteristics in our friend.
i dont make them you dumbass
Originally posted by MarcUK
Simply put, the clockspeed walls are due to the number of pipelines,
a 31 stage Prescott P4 at 4.0GHZ = 129Mhz per stage (90nm)
a 14(?)stage PPC970 at 2.5 GHZ = 178.5Mhz per stage (90nm)
compare this to
a four stage G4 (7400) at 600 Mhz = 150Mhz per stage (180nm)
a seven stage G4 (7447) at 1.5 Ghz = 214Mhz per stage (130nm)
a 12 stage Athlon 64 at 2.4 ghz = 200Mhz per stage (130nm)
a 20 stage Northwood P4 at 3.2 Ghz = 160Mhz per stage (130nm)
it would appear simplistically that we are approaching the limits already, except Intel who have dropped the ball. Getting 200Mhz per stage is doing extremely well. So I go wih Nr9 and Programmer
Thank you for that thought provoking reply. I understand general science and physics, but have very little knowledge about the inner workings of a CPU. I may have to study this subject to see how it affects the 90nm issue. I've noticed that the number of stages relates to the maximum clock speed, but this is true for any size process used in the past. The 90nm process hit us with a new problem, higher than anticipated leakage current. So, in a way, we are talking about two separate "walls" so to speak, but I do realize they may be very much interdependent. I wish I had time to study this right now.
It seems the new leakage current is due to the extremely thin separation between parts of the transistor at 90nm. It doesn't do the job of isolation that it does in larger processes. As the voltage increases this leakage goes us very rapidly, and voltage must to increased to get to higher clock speeds. If the Intel CPU architecture somehow allows a higher clock rate at lower voltages than IBM's architecture, this would explain the different limits, 2.5GHz and 4GHz. Otherwise, I'm not sure. It'll have to wait until I learn a bit more.
Originally posted by Nr9
i dont make them you dumbass
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Originally posted by Nr9
it solves it because it is twice the area hence easier to cool.
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
What's about the CELL processor yet or do you need some links, maybe?
Originally posted by Fat Freddy
Hey Mr. IBM!
What's about the CELL processor yet or do you need some links, maybe?
Originally posted by snoopy
[snip]
If the Intel CPU architecture somehow allows a higher clock rate at lower voltages than IBM's architecture, this would explain the different limits, 2.5GHz and 4GHz. Otherwise, I'm not sure. It'll have to wait until I learn a bit more.
Im no expert. Ive generally read all the CPU theory at Arstechnica, and there is a good article there at the moment. www.arstechnica.com they've redesigned their site today, so I dont have a clue where everything has gone now
My analysis is something I've worked out on my own, I don't know how well it analogizes the real world, but I can definately see some correlations. Also I dont see that Intel chips run at a drastically lower voltage than anyone else. The speed comes from massive pipelines and managed heat dissipation
Re:THT "mature fab issues" - exactly why I say Intel have dropped the ball -It appears they could go much faster but they can not. And consider I said 'approaching the limits'-
That means I fully expect IBM to knock out 3Ghz 970's on a mature process. That will give
14 stage 970 at 3.0 Ghz = 214Mhz per stage (doing really well)
14 stage 970 at 3.5 Ghz = 250Mhz per stage (exceptional fabbing but a bit unlikely)
I honestly cannot see them getting better than this, because I havn't found evidence of any processor scaling this well on any process.
This is hardly earth shattering stuff, but welcome nonetheless. The limits are quite clear and easy to see. Dual Core is obviously the answer. Going from 2.5 on an early 90nm process to 3.5 Ghz on a mature 90nm process is 40% improvement. This contrasts to the 130nm processors which have all seen greater than 100% gains in speed. Scaling is dying. Even IBM admitted it.
Originally posted by MarcUK
Re:THT "mature fab issues" - exactly why I say Intel have dropped the ball -It appears they could go much faster but they can not.
I honestly cannot see them getting better than this, because I havn't found evidence of any processor scaling this well on any process.
The 65 nm node is expected to be doable, before quantum effects makes CMOS processes unmanageable. An order of magnitude challenge over 90 nm, but doable. I would expect another nontrivial increase in MHz from it.
As for Intel, they simply just haven't bit the bullet and implemented a high performance cooling system on a mass production scale.
This is hardly earth shattering stuff, but welcome nonetheless. The limits are quite clear and easy to see. Dual Core is obviously the answer.
No doubt. But clock rate scaling is still there for a little while longer, including clock rate scaling on multi-core processors. After that, perhaps, CPUs will have different clock rates for different parts of the processor that will clock even higher. But yeah, we all agree that CMOS based computing devices are nearing the end with only 2 (give or take) nodes left milk, before quantum effects become unmanageable.
Going from 2.5 on an early 90nm process to 3.5 Ghz on a mature 90nm process is 40% improvement. This contrasts to the 130nm processors which have all seen greater than 100% gains in speed. Scaling is dying. Even IBM admitted it.
I'm not liking the way you count.
Originally posted by snoopy
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
You double the transistors, but lower the frequency. In the end, there's a pretty big benefit, thermally, since you end up using less than half the power. (non-linear scaling)
Originally posted by THT
I'm not liking the way you count.
Personally I dont think 65nm will yield any significant gains in speed. I think it will allow dual cores to be as inexpensive to manufacture as single core 90nm. The heat wont drop, or the speed increase much, and unless there is some wierd quantum effect that only manifests itself at 90nm, i think the 65nm node will be a real bitch to perfect.
I knew you wouldn't like the way I count, but I excluded 2.0 ghz because
a) this speed was already reached by the 130nm process, where as other process shrinks generally allow a speed increase or drastic heat reduction. 90nm did not, so the 2.5ghz chips are the first that can be attributed to the improvement of shrinking the die to 90nm.
b) IBM's supply of 2.0ghz 90nm 970's was obviously the pre-production test of the process for the xServe for at least 6 months.
c) It made my point more effective.
But they aren't noisy likey Wintel/AMD machines. They run quieter. Part of the Apple 'ethos' mentioned earlier.
Yields or noise politics aside...is it so much of a stretch that 2.6, 2.8 or 3 gig chips are far away? On a mature 0.09 fab?
The AMD/Wintel mhz race took us this far. Futher than I expected for years. I thought Intel was going to milk the 700mhz upto 1 gig ramp for years. AMD pushed them all the way for a while.
The mighty champ of 'mhz' is calling its chips numbers which have no resemblence to 'speed numbers' anymore. Sign of times.
So, a G5 in that context sounds like a real competitor!
Still, a 3 gig 970fx...dual core against a Prescott limping to 4 gig sounds a real performer. Surely a gig of that Prescott is flab from an old champ about to get his head caved in.
Look at benches on Tomshardware for AMD/Intel chips. The 'mhz' may seem impressive...but look at benches on Lightwave, Cinema and Max and you'll see mere seconds between a 3 gig chip and a '3.8' gig chip.
3-5% increments of performance advantage. For which you pay huge 100% price premiums over a chip a mere few speed grades down!
In that context, the dual 2.5 gig G5 with 1.25 gig bus seems like a powerhouse of a good deal (stingy ram and graphic card aside...)
As we go to dual-core...it seems PPC is going into the next round of bump grades with horse shoes in its boxing gloves...
...fighting the next performance war on its own turf?
Home advantage?
Lemon Bon Bon
I think we're only going to get significant improvements in the near future by going parallel. Dual core it is. I'll take that over a 25% linear bump to 3 gig.
I'd like both...come on PPC...you can make it...3 gig...3gig...3 gig...
Originally posted by Nr9
i dont make them you dumbass
A four page thread based on some troll's rude, grammatically challenged posts? Oh right, this is AI.
Originally posted by Splinemodel
You double the transistors, but lower the frequency. In the end, there's a pretty big benefit, thermally, since you end up using less than half the power. (non-linear scaling)
Just a comment -- IBM is currently working on dual a core versions of the 970FX, with enhancements. That is if we can believe some web sites, but there is documented evidence. I would not expect IBM to lower the clock rate for this 970MP, but they might.
Putting that aside, I simply responded to the claim that because a dual core is twice the area it is therefore easier to cool. This statement is not true. There was no provision that we lower frequency at the same time.
I agree on the benefits of adding a second core now that we are at 90nm. It's likely impossible to get that same performance boost by running at higher frequency because of the extreme power dissipation. Going multi core at 90nm is simply taking the path of least resistance to a performance boost.
THere is an obvious problem with the OpenGL coming from Apple. Fixing that alone would boost current G5 #'s a bit, but getting the whole driver problems worked out could leave PowerMac;s looking pretty good (in 3D performance tests) now.
Originally posted by snoopy
When asked, "I don't get the thing about dual core designs solving power consumption problems . . . ," you replied:
Twice the area, but twice the power. Or were you thinking about power density? If so, power density does not change and you get no help there. You didn't seem to get it when I first replied.
eh wahtever you think
obviously it was with respect to the alternative, which is a faster single core
Originally posted by onlooker
THere is an obvious problem with the OpenGL coming from Apple.
Definitely.
Originally posted by Nr9
eh wahtever you think
obviously it was with respect to the alternative, which is a faster single core
Do I detect a slightly milder Nr9? I can accept your explanation, but I only had your words to go by, which appears to be two independent reasons for going dual core. The first one is wrong and the second one is correct. It takes a lot of mental gymnastics for the reader to see the other meaning you had in mind.
Originally posted by Nr9
it solves it because it is twice the area hence easier to cool. Also, you don't have to drive the voltage up(which you have to do if you want to up the frequency instead) power is proportional to voltage ^2 so that matters a lot ...
Let me try to say what I think you meant: Increasing performance by increasing clock rate means we keep the same chip size, but increase power greatly. This is really hard or impossible to cool. By going dual core, power goes up but so does chip size. Also, the power increase with a dual core is less than with a boost in clock frequency.
As one engineer to another, the most valuable thing I learned was to communicate better. I had to take what was jokingly called dumbbell English at the university. For years I worked on improving my communication skills, which do not come naturally for me, but the effort is worth it, and it is not a finished work. I am constantly trying to improve, to say things better and get my point across more easily and clearly.