Not that the Tom's Hardware article isn't interesting but it really does say nothing outside of a few codenames, that cores will be added and expected cache. There's a lot more to be said. Even Merom and Conroe have had very few details actually released about the chip's design.
This was a generalized forward looking map. They've had much more detailed articles which I've posted links to before. There is a fair amount known about both Merom and Conroe.
It pays to read both tomshardware.com and anandtech.com regularly nowadays, as well as arstechnica.com, esp for Hannibal's technical articles, as all of this now pertains to us as well.
Not that the Tom's Hardware article isn't interesting but it really does say nothing outside of a few codenames, that cores will be added and expected cache. There's a lot more to be said. Even Merom and Conroe have had very few details actually released about the chip's design.
Well, neither of them actually gave us any details; I guess it'll be simply a matter of time before a arstechnica article comes out, explainings the inner workings of these cpus.
This was a generalized forward looking map. They've had much more detailed articles which I've posted links to before. There is a fair amount known about both Merom and Conroe.
It pays to read both tomshardware.com and anandtech.com regularly nowadays, as well as arstechnica.com, esp for Hannibal's technical articles, as all of this now pertains to us as well.
Both Anand and Ars have extended Mac coverage.
Very little actual data has been released about what they have done with Merom or Conroe other than some general handwaving, like stating it is a 4 issue core, has a slightly longer integer pipeline and improvements to the cache. None of that really states much about the implementation. From there they've really only made statements on how it will borrow from one architecture or another but they've said very little about the full package and how it fits together, nor will they until the next IDF or more likely until release.
The vast majority of what is out there is speculation. To take a quote from one of your beloved sites:
Quote:
The simple truth is that no one other than Intel and people under strict NDA really know for sure what the Conroe architecture will entail.
This discussion would be more appropriate in Future Hardware but the roadmap fails to even address questions such as CSI, which was due for Whitefield. This announcement really only tells people Intel is going great with their manufacturing processes and they are going heavily multi-core.
Very little actual data has been released about what they have done with Merom or Conroe other than some general handwaving, like stating it is a 4 issue core, has a slightly longer integer pipeline and improvements to the cache. None of that really states much about the implementation. From there they've really only made statements on how it will borrow from one architecture or another but they've said very little about the full package and how it fits together, nor will they until the next IDF or more likely until release.
The vast majority of what is out there is speculation. To take a quote from one of your beloved sites:
This discussion would be more appropriate in Future Hardware but the roadmap fails to even address questions such as CSI, which was due for Whitefield. This announcement really only tells people Intel is going great with their manufacturing processes and they are going heavily multi-core.
I'm not really going to look up the secveral articles that have been published. But I'll show the one that came up first on Ars site when I typed Merom into their sites search. At the bottom are more articles that they have there.
I'm not really going to look up the secveral articles that have been published. But I'll show the one that came up first on Ars site when I typed Merom into their sites search. At the bottom are more articles that they have there.
It's ok you don't understand but the articles you have quoted say very little beyond what I have already stated and are in large part speculative articles. If you think you can talk about a new architecture in a page you have some things to learn about.
Intel simply hasn't released the full details publicly yet, this is very well known and hardly surprising. Having multiple articles repeat the same facts still doesn't completely outline an architecture. There's a reason AnandTech made the comment that nobody outside of Intel and NDAs knows yet, because they don't.
It's ok you don't understand but the articles you have quoted say very little beyond what I have already stated and are in large part speculative articles. If you think you can talk about a new architecture in a page you have some things to learn about.
Intel simply hasn't released the full details publicly yet, this is very well known and hardly surprising. Having multiple articles repeat the same facts still doesn't completely outline an architecture. There's a reason AnandTech made the comment that nobody outside of Intel and NDAs knows yet, because they don't.
I haven't said that they released FULL details yet. We don't need full details to see how the architecture is different, and what it will do. There have also been MHZ speeds for the families published by Intel. The highly detailed reports that Hannibal puts out aren't necessary for general the understanding of what the chip is. And we have that.
If you like to pour through the details, fine. I enjoy that as well. But most people don't. Hannibal is usually correct, and has resources for his information that you don't.
Comments
Originally posted by Telomar
Not that the Tom's Hardware article isn't interesting but it really does say nothing outside of a few codenames, that cores will be added and expected cache. There's a lot more to be said. Even Merom and Conroe have had very few details actually released about the chip's design.
This was a generalized forward looking map. They've had much more detailed articles which I've posted links to before. There is a fair amount known about both Merom and Conroe.
It pays to read both tomshardware.com and anandtech.com regularly nowadays, as well as arstechnica.com, esp for Hannibal's technical articles, as all of this now pertains to us as well.
Both Anand and Ars have extended Mac coverage.
Originally posted by Telomar
Not that the Tom's Hardware article isn't interesting but it really does say nothing outside of a few codenames, that cores will be added and expected cache. There's a lot more to be said. Even Merom and Conroe have had very few details actually released about the chip's design.
Well, neither of them actually gave us any details; I guess it'll be simply a matter of time before a arstechnica article comes out, explainings the inner workings of these cpus.
Originally posted by melgross
This was a generalized forward looking map. They've had much more detailed articles which I've posted links to before. There is a fair amount known about both Merom and Conroe.
It pays to read both tomshardware.com and anandtech.com regularly nowadays, as well as arstechnica.com, esp for Hannibal's technical articles, as all of this now pertains to us as well.
Both Anand and Ars have extended Mac coverage.
Very little actual data has been released about what they have done with Merom or Conroe other than some general handwaving, like stating it is a 4 issue core, has a slightly longer integer pipeline and improvements to the cache. None of that really states much about the implementation. From there they've really only made statements on how it will borrow from one architecture or another but they've said very little about the full package and how it fits together, nor will they until the next IDF or more likely until release.
The vast majority of what is out there is speculation. To take a quote from one of your beloved sites:
The simple truth is that no one other than Intel and people under strict NDA really know for sure what the Conroe architecture will entail.
This discussion would be more appropriate in Future Hardware but the roadmap fails to even address questions such as CSI, which was due for Whitefield. This announcement really only tells people Intel is going great with their manufacturing processes and they are going heavily multi-core.
Originally posted by Telomar
Very little actual data has been released about what they have done with Merom or Conroe other than some general handwaving, like stating it is a 4 issue core, has a slightly longer integer pipeline and improvements to the cache. None of that really states much about the implementation. From there they've really only made statements on how it will borrow from one architecture or another but they've said very little about the full package and how it fits together, nor will they until the next IDF or more likely until release.
The vast majority of what is out there is speculation. To take a quote from one of your beloved sites:
This discussion would be more appropriate in Future Hardware but the roadmap fails to even address questions such as CSI, which was due for Whitefield. This announcement really only tells people Intel is going great with their manufacturing processes and they are going heavily multi-core.
I'm not really going to look up the secveral articles that have been published. But I'll show the one that came up first on Ars site when I typed Merom into their sites search. At the bottom are more articles that they have there.
http://arstechnica.com/news.ars/post/20050823-5232.html
But, if you want to see some, and look through them, here's the search results. I can do this for other sites that have published, if you need it.
http://mutazilite.arstechnica.com/cg...=Merom&x=0&y=0
Originally posted by melgross
I'm not really going to look up the secveral articles that have been published. But I'll show the one that came up first on Ars site when I typed Merom into their sites search. At the bottom are more articles that they have there.
http://arstechnica.com/news.ars/post/20050823-5232.html
But, if you want to see some, and look through them, here's the search results. I can do this for other sites that have published, if you need it.
http://mutazilite.arstechnica.com/cg...=Merom&x=0&y=0
It's ok you don't understand but the articles you have quoted say very little beyond what I have already stated and are in large part speculative articles. If you think you can talk about a new architecture in a page you have some things to learn about.
Intel simply hasn't released the full details publicly yet, this is very well known and hardly surprising. Having multiple articles repeat the same facts still doesn't completely outline an architecture. There's a reason AnandTech made the comment that nobody outside of Intel and NDAs knows yet, because they don't.
Originally posted by Telomar
It's ok you don't understand but the articles you have quoted say very little beyond what I have already stated and are in large part speculative articles. If you think you can talk about a new architecture in a page you have some things to learn about.
Intel simply hasn't released the full details publicly yet, this is very well known and hardly surprising. Having multiple articles repeat the same facts still doesn't completely outline an architecture. There's a reason AnandTech made the comment that nobody outside of Intel and NDAs knows yet, because they don't.
I haven't said that they released FULL details yet. We don't need full details to see how the architecture is different, and what it will do. There have also been MHZ speeds for the families published by Intel. The highly detailed reports that Hannibal puts out aren't necessary for general the understanding of what the chip is. And we have that.
If you like to pour through the details, fine. I enjoy that as well. But most people don't. Hannibal is usually correct, and has resources for his information that you don't.