I'm not waiting for quad-cores. Dual-duals will be just fine
Probably faster actually. Because of Intel's FSB and lack of onboard memory controller, a quad-core intel chip would be like trying to get 4 fat women through a revolving door at once. Better to have two doors with two fat women.
If Woodcrest is 80% quicker than a Xeon then they may just leapfrog AMD's Opteron, at least in dual and maybe quad format. Probably not after quad though.
I can't believe you're buying Intel's own benchmarks, that they got Anand to perform for them, with machines Intel set -up, behind closed doors. And let Anand "benchmark" them for only ONE HOUR.
Quote:
A %40 advantage in games and %30+ in media encoding just like that??
You said it yourself: just like that? Meanwhile, Hannibal from Ars kinda doubts the results were fair game.
Quote:
Ok, before you click the link I'm about to show you, I encourage you to go to one of those foodie speciality shops in your local upscale mall and buy the very largest grain of exotic salt you can find. Only when you have that grain sitting in the chair next to you are allowed to check out Anand's Intel-provided Conroe benchmarks. Now, go ahead and start working on that salt...
In short, Intel configured two systems for Anand to test, one of which contains a Conroe and the other of which contains an Athlon X2. Unsurprisingly, the Conroe absolutely creamed the Athlon, in every benchmark.
I did indeed enjoy the benchmarks. I also enjoy movies about hobbits and wizards.
Alright alright, I'm being a bit harsh. For the record, I do actually expect Intel to regain the performance crown from the Athlon with Conroe. I've said as much before here at Ars. However, those benchmarks represent a pretty dramatic butt-whuppin' across the board, and such extraordinary claims require extraordinary proof. Vendor-supplied black-box proof doesn't count.
Let's wait for some independent (as opposed to Intel-configured and dictated) benchmarks and we'll see if those slaps are really slaps, or just more hot air from Intel.
can't believe you're buying Intel's own benchmarks, that they got Anand to perform for them, with machines Intel set -up, behind closed doors. And let Anand "benchmark" them for only ONE HOUR.
Anand's team said they could discern no trickery and that it would be foolish because they'll have shipping hardware in months for a more thorough evaluation.
Quote:
You said it yourself: just like that? Meanwhile, Hannibal from Ars kinda doubts the results were fair game.
I like Hannibal and ARS but Anandtech they are not. Credibility goes to Anandtech first and foremost. Sorry
Quote:
Let's wait for some independent (as opposed to Intel-configured and dictated) benchmarks and we'll see if those slaps are really slaps, or just more hot air from Intel.
Gene you're welcome to wait if you'd like but I believe the benchmarks. The yonah test of a month back showed the chip nipping at the heels of the Athlon then. When you add in double the cache, Micro and Macro fusion, 128-bit single cycle SSE and a 4-issue core vs 3 it's not hard to see why Intel has a winning part here.
In this case I choose to go with my gut rather than FUD from ARS.
Anand also noted that the fear benchmark was the same one they always use. I believe this is quite a chip
Good point. I forgot that one. I'm most flabbergasted that some peope actually thought that Intel would just sit back and let AMD maintain the lead indefinitely.
Intel new this day was coming 2 yrs ago when they cancelled Tejas. The Israeli design team that delivered Banias and Dothan worked on this core perhaps with India. You could tell Intel wasn't all that nervous, they continued to milk Netburst for all its worth and now they have a core that has years of life in it.
Frankly after looking at this stuff I can see why Jobs was smart to bail from IBM. Yonah can shut down a core and partition L2 cache but Merom/Conroe/Woodcrest seems to be able to shut down more parts of the processor. The SSE has got me salivating. Apple should be all over 128-bit SSE4 in Leopard. I'm thinking we're about to see some very cool stuff coming in at the high end.
This is looking like a great year to buy a new Mac Workstation.
Even Conroe looks promising, and I was not excited about this processor in a Mac Tower art all. I think/hope we see both Conroe, and Woodcrest processors in the next Mac Workstation/ Towers. Single, and dual socket options for both processors.
I must say that last year when Apple announced they were going Intel I felt betrayed and very angry. But, these announcements look INCREDIBLE! I will have try these first but I take a little Texas Pete with my crow
What is your deal? Apple, and Intel are looking more promising that many expected vs. AMD, and now possibly even in the lead with Woodcrest vs Opteron, and your all hot, and negative about it.
However, Conroe will also feature a new 128-bit SSE optimization that will allow all SSE instructions to be completed in a single cycle
My emphasis added. This will likely usurp Altivec as the premier SIMD implementation. Wow single cycle for all instructions. Apple's going to have a field day with this.
I think I said something, a few months ago, about how Intel would inevitably integrate a proper vector processor more similar to Altivec. This is great news, since it means that going from the G5 to the Intel powermac won't make my 3D rendering & mathematical simulations run slower.
now, if only there were two vector cores per cpu core. . .
I think I said something, a few months ago, about how Intel would inevitably integrate a proper vector processor more similar to Altivec. This is great news, since it means that going from the G5 to the Intel powermac won't make my 3D rendering & mathematical simulations run slower.
now, if only there were two vector cores per cpu core. . .
News flash: AltiVec has always had all instructions in one clock cycle. And it has 4x as many architected registers (really important for optimization). And it has better instructions (fused multiply-add, data driven permute, more flexible unified integer/float type support).
Yes its about time that Intel improved their SSE implementation to be competitive, no it doesn't eclipse AltiVec. Sadly we may never see where IBM or Motorola could have taken AltiVec's superior design. Ah well.
I was thinking that Altivec was 64-bit. What's needed is a 256-bit SIMD implementation. Or at the least a 128-bit implementation that can process double precision in once cycle.
What's needed is a 256-bit SIMD implementation. Or at the least a 128-bit implementation that can process double precision in once cycle.
Well, one of SSE's only clear advantages over Altivec is that it processes double-precision floats at all. Altivec is single-precision only (see last page of this PDF), whereas SSE2 and SSE3 can process double-precision data.
Does the single-cycle improvement that is coming from Intel not apply to double-precision SSE?
What is your deal? Apple, and Intel are looking more promising that many expected vs. AMD, and now possibly even in the lead with Woodcrest vs Opteron, and your all hot, and negative about it. ...
I call Fanboy! By the time Woodcrest machines appear - sometime in 2007, mark my words - the Opterons available then will soundly trounce Intel's best.
FTM, I doubt Apple will use Woodcrest processors at all. They'll be too expensive.
Comments
Originally posted by nagromme
I'm not waiting for quad-cores. Dual-duals will be just fine
Probably faster actually. Because of Intel's FSB and lack of onboard memory controller, a quad-core intel chip would be like trying to get 4 fat women through a revolving door at once. Better to have two doors with two fat women.
If Woodcrest is 80% quicker than a Xeon then they may just leapfrog AMD's Opteron, at least in dual and maybe quad format. Probably not after quad though.
Originally posted by hmurchison
[B]2.66Ghz Conroe slaps the Athlon 64 X2 2.8Ghz around
PWN3D!
I can't believe you're buying Intel's own benchmarks, that they got Anand to perform for them, with machines Intel set -up, behind closed doors. And let Anand "benchmark" them for only ONE HOUR.
A %40 advantage in games and %30+ in media encoding just like that??
You said it yourself: just like that? Meanwhile, Hannibal from Ars kinda doubts the results were fair game.
Ok, before you click the link I'm about to show you, I encourage you to go to one of those foodie speciality shops in your local upscale mall and buy the very largest grain of exotic salt you can find. Only when you have that grain sitting in the chair next to you are allowed to check out Anand's Intel-provided Conroe benchmarks. Now, go ahead and start working on that salt...
In short, Intel configured two systems for Anand to test, one of which contains a Conroe and the other of which contains an Athlon X2. Unsurprisingly, the Conroe absolutely creamed the Athlon, in every benchmark.
I did indeed enjoy the benchmarks. I also enjoy movies about hobbits and wizards.
Alright alright, I'm being a bit harsh. For the record, I do actually expect Intel to regain the performance crown from the Athlon with Conroe. I've said as much before here at Ars. However, those benchmarks represent a pretty dramatic butt-whuppin' across the board, and such extraordinary claims require extraordinary proof. Vendor-supplied black-box proof doesn't count.
Let's wait for some independent (as opposed to Intel-configured and dictated) benchmarks and we'll see if those slaps are really slaps, or just more hot air from Intel.
can't believe you're buying Intel's own benchmarks, that they got Anand to perform for them, with machines Intel set -up, behind closed doors. And let Anand "benchmark" them for only ONE HOUR.
Anand's team said they could discern no trickery and that it would be foolish because they'll have shipping hardware in months for a more thorough evaluation.
You said it yourself: just like that? Meanwhile, Hannibal from Ars kinda doubts the results were fair game.
I like Hannibal and ARS but Anandtech they are not. Credibility goes to Anandtech first and foremost. Sorry
Let's wait for some independent (as opposed to Intel-configured and dictated) benchmarks and we'll see if those slaps are really slaps, or just more hot air from Intel.
Gene you're welcome to wait if you'd like but I believe the benchmarks. The yonah test of a month back showed the chip nipping at the heels of the Athlon then. When you add in double the cache, Micro and Macro fusion, 128-bit single cycle SSE and a 4-issue core vs 3 it's not hard to see why Intel has a winning part here.
In this case I choose to go with my gut rather than FUD from ARS.
Originally posted by howyoudoin
Anand also noted that the fear benchmark was the same one they always use. I believe this is quite a chip
Good point. I forgot that one. I'm most flabbergasted that some peope actually thought that Intel would just sit back and let AMD maintain the lead indefinitely.
Intel new this day was coming 2 yrs ago when they cancelled Tejas. The Israeli design team that delivered Banias and Dothan worked on this core perhaps with India. You could tell Intel wasn't all that nervous, they continued to milk Netburst for all its worth and now they have a core that has years of life in it.
Frankly after looking at this stuff I can see why Jobs was smart to bail from IBM. Yonah can shut down a core and partition L2 cache but Merom/Conroe/Woodcrest seems to be able to shut down more parts of the processor. The SSE has got me salivating. Apple should be all over 128-bit SSE4 in Leopard. I'm thinking we're about to see some very cool stuff coming in at the high end.
Even Conroe looks promising, and I was not excited about this processor in a Mac Tower art all. I think/hope we see both Conroe, and Woodcrest processors in the next Mac Workstation/ Towers. Single, and dual socket options for both processors.
Suppose it will save everyone money in the long run, not having to pay for more than 2gb of ram.
- Xidius
Originally posted by >_>
So back to 32-bit processing in the Tower?
Suppose it will save everyone money in the long run, not having to pay for more than 2gb of ram.
- Xidius
Merom/Conroe/Woodcrest are all EM64T procs. 64-Bit through and through.
Originally posted by hmurchison
Merom/Conroe/Woodcrest are all EM64T procs. 64-Bit through and through.
Phew.
Ooooo... 64-bit Macbook Pro.. Can't wait!
- Xidius
Originally posted by hmurchison
64-Bit through and through.
Yeah, a bad copy of AMD64. Through and through.
Originally posted by hmurchison
Check this out. Conroe has 128-Bit SSE
However, Conroe will also feature a new 128-bit SSE optimization that will allow all SSE instructions to be completed in a single cycle
SSE was always 128-bit. The only change is with the NGMA they are completed in one cycle, which is a big change mind you.
Originally posted by Gene Clean
Yeah, a bad copy of AMD64. Through and through.
What is your deal? Apple, and Intel are looking more promising that many expected vs. AMD, and now possibly even in the lead with Woodcrest vs Opteron, and your all hot, and negative about it.
I'm excited regardless. It's a Mac year.
Originally posted by hmurchison
Check this out. Conroe has 128-Bit SSE
However, Conroe will also feature a new 128-bit SSE optimization that will allow all SSE instructions to be completed in a single cycle
My emphasis added. This will likely usurp Altivec as the premier SIMD implementation. Wow single cycle for all instructions. Apple's going to have a field day with this.
I think I said something, a few months ago, about how Intel would inevitably integrate a proper vector processor more similar to Altivec. This is great news, since it means that going from the G5 to the Intel powermac won't make my 3D rendering & mathematical simulations run slower.
now, if only there were two vector cores per cpu core. . .
Originally posted by Splinemodel
I think I said something, a few months ago, about how Intel would inevitably integrate a proper vector processor more similar to Altivec. This is great news, since it means that going from the G5 to the Intel powermac won't make my 3D rendering & mathematical simulations run slower.
now, if only there were two vector cores per cpu core. . .
News flash: AltiVec has always had all instructions in one clock cycle. And it has 4x as many architected registers (really important for optimization). And it has better instructions (fused multiply-add, data driven permute, more flexible unified integer/float type support).
Yes its about time that Intel improved their SSE implementation to be competitive, no it doesn't eclipse AltiVec. Sadly we may never see where IBM or Motorola could have taken AltiVec's superior design. Ah well.
I was thinking that Altivec was 64-bit. What's needed is a 256-bit SIMD implementation. Or at the least a 128-bit implementation that can process double precision in once cycle.
Originally posted by hmurchison
What's needed is a 256-bit SIMD implementation. Or at the least a 128-bit implementation that can process double precision in once cycle.
Well, one of SSE's only clear advantages over Altivec is that it processes double-precision floats at all. Altivec is single-precision only (see last page of this PDF), whereas SSE2 and SSE3 can process double-precision data.
Does the single-cycle improvement that is coming from Intel not apply to double-precision SSE?
Originally posted by onlooker
What is your deal? Apple, and Intel are looking more promising that many expected vs. AMD, and now possibly even in the lead with Woodcrest vs Opteron, and your all hot, and negative about it. ...
I call Fanboy! By the time Woodcrest machines appear - sometime in 2007, mark my words - the Opterons available then will soundly trounce Intel's best.
FTM, I doubt Apple will use Woodcrest processors at all. They'll be too expensive.