<strong>Please forgive my ignorance, but this brings up a question for me. How are the duals connected to the FSB? As I understand it, they are connected in such a way that the FSB is part of Motos fab, and Apple cannot change the bus. This led me to assume the FSB was part of the G4 cpu, and that Duals would have two busses? And, if the FSB is not on the cpu but rather on the chipset, what about the design has made, altering it too expensive?</strong><hr></blockquote>
Each chip (the processors and the chipset) have a "bus interface" to which the bus connects. MPX is a shared bus, so in Apple's dual processor machines there are 3 devices all connected by the same bus (a bus is basically a set of motherboard traces which are organized by some protocol). Only one device can use the bus at a time, so they need to negotiate for who is going to use it next (they can all listen at once to make sure they know what is going on).
<strong>Yeah, here's my thoughts, no way. First off Crolles, the facility you speak of is a R&D center first and foremost. It has limited production capabilities and is more of a pilot line for development work on 90nm and sub 90nm processes.
As for your time frame there is little chance that anyone will beat Intel, IBM, or AMD to 90nm for high performance complex CMOS production. Even they are shooting for 90nm production in Q4 '03 at best. There have been a number of issues that have arisen trying to get 90nm going and now a good segment of the industry has pushed out adoption to late '04 or early '05. It is becoming paramount for designers to take into account the production challenges present at 130nm and below. This means simple scaling is no longer as feasible for a design intended for an older technology like .18um.</strong><hr></blockquote>
Yeah, I wouldn't hold my breathe for an early adoption of anything by Motorola. <img src="graemlins/oyvey.gif" border="0" alt="[oyvey]" /> I wonder if IBM's "rapid migration" plan for the 970 on 0.09 takes into account the issues that "have arisen". I believe IBM has been experimenting with 0.09 for a while now, and their design techniques may allow them to move the 970 to the new process more rapidly than other companies can manage to move their designs.
Each chip (the processors and the chipset) have a "bus interface" to which the bus connects. MPX is a shared bus, so in Apple's dual processor machines there are 3 devices all connected by the same bus (a bus is basically a set of motherboard traces which are organized by some protocol). Only one device can use the bus at a time, so they need to negotiate for who is going to use it next (they can all listen at once to make sure they know what is going on).</strong><hr></blockquote>
Thanks very much for the information Programmer.
Back to the 970...
According to
<a href="http://www.realworldtech.com/page.cfm?AID=RWT101502203725"; target="_blank">David Wang's article on the 970</a> (Oct,2002). The 970's companion chip will be difficult to engineer. [quote]<strong>... the specification of the ~900 MHz operation on the system board would require considerable investment into the system support chip. Moreover, the nature of the point to point interconnect means that to support a dual CPU system, the companion chip must be designed with the dual CPU SMP in mind, with dedicated channels devoted to each CPU. Furthermore, to support the high bandwidth available on the system interconnect, a dual channel PC2700 DDR SDRAM memory system would appear to be a minimum requirement to support a single CPU... </strong><hr></blockquote> The article goes on to say this will add to the 970's expense and restrict it to the PowerMacs. Guess we won't see the 970 in a Mac untill Apple has it's support chip ready. No reason to expect Apple hasn't been planning for this, or is behind schedule. But there is at least one other (rather complicated) factor involved in the timing of the 970's appearance. So even if IBM has chips in quantity early... Or maybe for Apple it'll all be as easy as pie. ...And speaking of Apple Pi could that be one of the suprises Trancendental Octothorpe was referring to?
Don't forget the possibility of Apple using IBM's companion chip (which will be released at the same time as the 970) and that chip in turn connects to an Apple peripheral controller which includes PCI, AGP, Firewire, Ethernet, USB, ATA, etc. (basically, everything except for the memory controller).
I would think that is a tricky situation when you debut a "best" system with a single 1.8 Ghz 970 system next to a dual 1.42 Ghz G4 at "better". </strong><hr></blockquote>
Avoiding this marketing difficulty is one reason why we'll see multi-processor 970s at the outset.
A second reason is to capture mindshare. Which would get more media play: A single 970 that puts the Mac platform on par with the p4, or a multi-processor 970 that smokes 'em.
A third reason is profit margins. It's almost axiomatic that margins improve as you move up the ladder. Better to sell one Porsche than 2 Miatas.
A fourth reason is internal morale. Companies are made up of people with egos. I'm sure their engineers are frustrated and a bit embarassed by shootouts between p4s and g4s. Building the baddest and fastest machine around will pump THEM up.
A fifth reason is because they can.
None of this is to say that the 970 will NEVER be released in a SP config. Just that I think it will DEBUT as a screamer.
Avoiding this marketing difficulty is one reason why we'll see multi-processor 970s at the outset.
A second reason is to capture mindshare. Which would get more media play: A single 970 that puts the Mac platform on par with the p4, or a multi-processor 970 that smokes 'em.
A third reason is profit margins. It's almost axiomatic that margins improve as you move up the ladder. Better to sell one Porsche than 2 Miatas.
A fourth reason is internal morale. Companies are made up of people with egos. I'm sure their engineers are frustrated and a bit embarassed by shootouts between p4s and g4s. Building the baddest and fastest machine around will pump THEM up.
A fifth reason is because the can.
None of this is to say that the 970 will NEVER be released in a SP config. Just that I think it will DEBUT as a screamer.</strong><hr></blockquote>
If it was me, the machine I'd debut would be a dual 1.6 and I'd keep it there for around 2 months.
Why?
1) A dual 1.6 970 will still blow the pants of any G4 system.
2) By releasing a dual system only, you keep the initial cost high, which keeps demand down whilst you pick up yield and production capacity.
3) A 1.6 is below the initial proposed maximum of 1.8 GHz, which means you still have some headroom to bring out a 1.8 uniprocessor once you have enough chips in the store cupboard and a massive latent demand.
[quote]Originally posted by Mark- Card Carrying FanaticRealist:
<strong>
If it was me, the machine I'd debut would be a dual 1.6 and I'd keep it there for around 2 months.
Why?
1) A dual 1.6 970 will still blow the pants of any G4 system.
2) By releasing a dual system only, you keep the initial cost high, which keeps demand down whilst you pick up yield and production capacity.
3) A 1.6 is below the initial proposed maximum of 1.8 GHz, which means you still have some headroom to bring out a 1.8 uniprocessor once you have enough chips in the store cupboard and a massive latent demand.</strong><hr></blockquote>
I think the intro-level performance should be a factor of how many fast chips they are getting in the fabs. If the yields of 1.8 GHz are terrific then ship a dual 1.8 GHz machine, if they are louzy then ship a 1.6 GHz machine (or whatever speed the yields are decent for). If the yields are really good at the 1.8 level then you can expect it'll ramp well and quickly beyond the initial 1.8, if they're not this gives Apple a bit of headroom once the 1.8's are plentiful. As a result I think speculating about the details and trying to figure out Apple's thought process behind the introduction is pointless -- their decision will be governed primarily by their supply of components as has always been the case.
As far as the PPC970 memory accessing needs: Apple's architecture is already there and Apple is selling it now. We look at the system controller as a way to get around the G4 memory speed - read SLOW - limitations. BUT - it also will get around the the PPC970 memory FAST SPEED needs. Apple's custom - read EXPENSIVE - solution was not aimed at just adding DDR to a G4, it's aimed at high speed access, so that the memory subsystem can be designed independtly of the Processor capability. In other words, for the PPC970, the System Controller will take care of the relatively slow memory, whereas on the G4 it takes care of the relatively fast memory.
[quote]Originally posted by Transcendental Octothorpe:
<strong>The 970 and the 'companion chip' should appear at the same time. (barring unforseen production problems, of course.)
Apple won't have to scramble to design a chip once they recieve production 970s. They'll already have them.</strong><hr></blockquote>
Yeah, I just saw an IBM .pdf simplified diagram that included the companion chip, and it hit me that they'd have to have one for their own use. Apple could either use IBM's or design their own depending on which suited them best. I still wonder if Apple pi will show up?
<strong>"They are working on software so that 2 processors will work seamlessly like 1." If that is true, then why wouldn't they have just asked IBM to make an actual (dual core) Power4 with the Altivec unit???</strong><hr></blockquote>
I don't have the actual manufacturing yeilds or # of chips per wafer, but here's how it goes:
I make a 'wafer' which is as many 'chips' as possible wedged onto it. Say that's 20 single core chips.
There are ten defects -> _10_ survived. I can make 5 "Dual CPU" macs out of it.
A dual core is roughly double in size to a single core CPU. Yes, 2 singles should operate _very_ similar to one dual core. But. They're twice as large in chip area.
So that same wafer could only have 10 dual-core chips. But there's still going to be _10_ defects. If the defects were evenly distributed there'd be _zero_ usable dual core chips that survive. That really sucks.
My numbers are completely fake, but you can see that at least sometimes '2 single core CPUs' are prefered to aiming for dual core CPUs. When successrates are very high (meaning defects are very low) it starts getting useful to consider dual cores... or more. For the Power4, which is normally a dual-core chip, IBM does make boxes out of 'defective' ones, where one core tests out fine, and the other core is dead. A dual core chip saves quite a bit on complexity/wiring/motherboard issues, but it also concentrates the heat problems.
So there is a balancing act between 'which is better'.
Basically....Key Research got funding to make 64-bit servers running the Linux OS (inexpensive). They don't reveal what processor will be implemented, but will be released in the 2nd 1/2 of the yr. Perhaps they will be another 970 customer??
"Rosenthal declined to say what chips the company would use, but he said the company will rely on low-cost alternatives to the Itanium. Rosenthal said the company would reveal more about its machines later and will launch them in the second half of 2003."
Come on, we all know Apple will offer Quad 970 XtremeMacs(fastest) with processors running at 1.8 Ghz. If you can't afford that then it's DP 970 XtremeMacs at 1.6Ghz(faster) or single 970 1.6Ghz XtremeMacs.
Not a problem for IBM, they already deal quite effectively with it. They manufacture both dual and single core versions of the Power4, the single core versions are just a dual core that tests as a single core failure and is then laser isolated to generate a single core sellable chip.</strong><hr></blockquote>
Uh, did you not read his post?
[quote] For the Power4, which is normally a dual-core chip, IBM does make boxes out of 'defective' ones, where one core tests out fine, and the other core is dead. <hr></blockquote>
.....First off Crolles, the facility you speak of is a R&D center first and foremost.....<hr></blockquote>
I don't know how the Crolles facility got brought into this? If I remember correctly, the Motorola press release concerning high end processors ,manufactured at the end of 2002 using a 0.09µm or 0.10µm process, mentioned an Asian or Southeast Asian facility.
Then again, I could have dreamt the whole thing, since I can no longer find the press release.(Now I'm even getting confused as to whether they mentioned 0.090 or 0.10µm, they release so much #@$^ and never meet their dates, it's vexing.)
0.09µm, 0.10µm phooeey they forgot 0.15µm ... oh great googly moogly, I forgot they changed the size of their rulers/micrometers, whatever, so actually the 0.18µm was really actually 0.15µm, when in fact I thought it was truely 0.22µm. Anyway, was Motorola involved the Mars explorer that missed because different units of measure were co-mingled?
Bottom line, Motorola ain't shipped 0.13µm let alone 0.10µm or 0.090µm parts and don't expect them soon. @#!^$*&%$#*
damn, now what did I do with that bottle of lithium tablets.....???? Oh well, found my prozac.
[ 02-06-2003: Message edited by: rickag ]
[ 02-06-2003: Message edited by: rickag ]
I just noticed in the above rant, I continually wrote 0.9µm instead of 0.09µm, please forgive this adled brain of mine. Kind of funny though, having Motorola going backwards by a factor of 9X's in die size.
I think the intro-level performance should be a factor of how many fast chips they are getting in the fabs. If the yields of 1.8 GHz are terrific then ship a dual 1.8 GHz machine, if they are louzy then ship a 1.6 GHz machine (or whatever speed the yields are decent for). If the yields are really good at the 1.8 level then you can expect it'll ramp well and quickly beyond the initial 1.8, if they're not this gives Apple a bit of headroom once the 1.8's are plentiful. As a result I think speculating about the details and trying to figure out Apple's thought process behind the introduction is pointless -- their decision will be governed primarily by their supply of components as has always been the case.</strong><hr></blockquote>
You and I are probably not that far apart on this issue, the only fundamental difference being that my position pre-emptively seeks to make a 1.6 (or something similar that isn't quite the bleeding edge) the engine for a dual-processor system rather than just saying "let's wait and see whether we can get out enough 1.8s (or whatever defines the edge of the envelope) and then define the product/marketing development accordingly".
That said, if the process starts to reliably churn out 1.8s and you knew that was happening early enough - say June - then you could take a more relaxed view with the aim of pushing out a launch for some initial low-end units sometime in October, shipping for Thanksgiving, followed by another "buckle up" display of the "The Fastest (two-way, 64-bit) Machine You Can Buy For $3000" at MWSF '04 and - with any luck - an innvovative rack-mounted 4-way 1.6 at NAB 04.
All of this should just about keep the favourable column inches rolling for about six-eight months which will just about cover the fact that there may not be a summer show in '04.
[quote]Originally posted by Mark- Card Carrying FanaticRealist:
<strong>
You and I are probably not that far apart on this issue, the only fundamental difference being that my position pre-emptively seeks to make a 1.6 (or something similar that isn't quite the bleeding edge) the engine for a dual-processor system rather than just saying "let's wait and see whether we can get out enough 1.8s (or whatever defines the edge of the envelope) and then define the product/marketing development accordingly".
That said, if the process starts to reliably churn out 1.8s and you knew that was happening early enough - say June - then you could take a more relaxed view with the aim of pushing out a launch for some initial low-end units sometime in October, shipping for Thanksgiving, followed by another "buckle up" display of the "The Fastest (two-way, 64-bit) Machine You Can Buy For $3000" at MWSF '04 and - with any luck - an innvovative rack-mounted 4-way 1.6 at NAB 04.
All of this should just about keep the favourable column inches rolling for about six-eight months which will just about cover the fact that there may not be a summer show in '04.</strong><hr></blockquote>
Its been standard practice for Apple to decide on the exact processor speeds at a very late date before introduction of the machines. They've had to do this a lot with Motorola's track record.
Its been standard practice for Apple to decide on the exact processor speeds at a very late date before introduction of the machines. They've had to do this a lot with Motorola's track record.</strong><hr></blockquote>
No argument on this, but in reality that's why you would pre-emptively aim to deliver behind the bleeding edge - it's a psychology thing, I promise myself and aim to deliver something I know is within my grasp. Then, if my supplier turns out to be capable of walking the walk, I know I have somewhere to go within three months which keeps the product "hot" in the marketplace.
Genuinely, Programmer, I'm not looking for an argument here; I'm just putting forward a different way of bring 970 to the marketplace (under promise, then over deliver at regular intervals) so that we can spend the next three to five years continually moving the bar on the Wintel community. Let Dell and HP eat some crow for a while, it's only fair.
Comments
<strong>Please forgive my ignorance, but this brings up a question for me. How are the duals connected to the FSB? As I understand it, they are connected in such a way that the FSB is part of Motos fab, and Apple cannot change the bus. This led me to assume the FSB was part of the G4 cpu, and that Duals would have two busses? And, if the FSB is not on the cpu but rather on the chipset, what about the design has made, altering it too expensive?</strong><hr></blockquote>
Each chip (the processors and the chipset) have a "bus interface" to which the bus connects. MPX is a shared bus, so in Apple's dual processor machines there are 3 devices all connected by the same bus (a bus is basically a set of motherboard traces which are organized by some protocol). Only one device can use the bus at a time, so they need to negotiate for who is going to use it next (they can all listen at once to make sure they know what is going on).
<strong>Yeah, here's my thoughts, no way. First off Crolles, the facility you speak of is a R&D center first and foremost. It has limited production capabilities and is more of a pilot line for development work on 90nm and sub 90nm processes.
As for your time frame there is little chance that anyone will beat Intel, IBM, or AMD to 90nm for high performance complex CMOS production. Even they are shooting for 90nm production in Q4 '03 at best. There have been a number of issues that have arisen trying to get 90nm going and now a good segment of the industry has pushed out adoption to late '04 or early '05. It is becoming paramount for designers to take into account the production challenges present at 130nm and below. This means simple scaling is no longer as feasible for a design intended for an older technology like .18um.</strong><hr></blockquote>
Yeah, I wouldn't hold my breathe for an early adoption of anything by Motorola. <img src="graemlins/oyvey.gif" border="0" alt="[oyvey]" /> I wonder if IBM's "rapid migration" plan for the 970 on 0.09 takes into account the issues that "have arisen". I believe IBM has been experimenting with 0.09 for a while now, and their design techniques may allow them to move the 970 to the new process more rapidly than other companies can manage to move their designs.
<strong>
Each chip (the processors and the chipset) have a "bus interface" to which the bus connects. MPX is a shared bus, so in Apple's dual processor machines there are 3 devices all connected by the same bus (a bus is basically a set of motherboard traces which are organized by some protocol). Only one device can use the bus at a time, so they need to negotiate for who is going to use it next (they can all listen at once to make sure they know what is going on).</strong><hr></blockquote>
Thanks very much for the information Programmer.
Back to the 970...
According to
<a href="http://www.realworldtech.com/page.cfm?AID=RWT101502203725"; target="_blank">David Wang's article on the 970</a> (Oct,2002). The 970's companion chip will be difficult to engineer. [quote]<strong>... the specification of the ~900 MHz operation on the system board would require considerable investment into the system support chip. Moreover, the nature of the point to point interconnect means that to support a dual CPU system, the companion chip must be designed with the dual CPU SMP in mind, with dedicated channels devoted to each CPU. Furthermore, to support the high bandwidth available on the system interconnect, a dual channel PC2700 DDR SDRAM memory system would appear to be a minimum requirement to support a single CPU... </strong><hr></blockquote> The article goes on to say this will add to the 970's expense and restrict it to the PowerMacs. Guess we won't see the 970 in a Mac untill Apple has it's support chip ready. No reason to expect Apple hasn't been planning for this, or is behind schedule. But there is at least one other (rather complicated) factor involved in the timing of the 970's appearance. So even if IBM has chips in quantity early... Or maybe for Apple it'll all be as easy as pie. ...And speaking of Apple Pi could that be one of the suprises Trancendental Octothorpe was referring to?
<strong> ...
I would think that is a tricky situation when you debut a "best" system with a single 1.8 Ghz 970 system next to a dual 1.42 Ghz G4 at "better". </strong><hr></blockquote>
Avoiding this marketing difficulty is one reason why we'll see multi-processor 970s at the outset.
A second reason is to capture mindshare. Which would get more media play: A single 970 that puts the Mac platform on par with the p4, or a multi-processor 970 that smokes 'em.
A third reason is profit margins. It's almost axiomatic that margins improve as you move up the ladder. Better to sell one Porsche than 2 Miatas.
A fourth reason is internal morale. Companies are made up of people with egos. I'm sure their engineers are frustrated and a bit embarassed by shootouts between p4s and g4s. Building the baddest and fastest machine around will pump THEM up.
A fifth reason is because they can.
None of this is to say that the 970 will NEVER be released in a SP config. Just that I think it will DEBUT as a screamer.
[ 02-06-2003: Message edited by: Ompus ]</p>
Apple won't have to scramble to design a chip once they recieve production 970s. They'll already have them.
<strong>
Avoiding this marketing difficulty is one reason why we'll see multi-processor 970s at the outset.
A second reason is to capture mindshare. Which would get more media play: A single 970 that puts the Mac platform on par with the p4, or a multi-processor 970 that smokes 'em.
A third reason is profit margins. It's almost axiomatic that margins improve as you move up the ladder. Better to sell one Porsche than 2 Miatas.
A fourth reason is internal morale. Companies are made up of people with egos. I'm sure their engineers are frustrated and a bit embarassed by shootouts between p4s and g4s. Building the baddest and fastest machine around will pump THEM up.
A fifth reason is because the can.
None of this is to say that the 970 will NEVER be released in a SP config. Just that I think it will DEBUT as a screamer.</strong><hr></blockquote>
If it was me, the machine I'd debut would be a dual 1.6 and I'd keep it there for around 2 months.
Why?
1) A dual 1.6 970 will still blow the pants of any G4 system.
2) By releasing a dual system only, you keep the initial cost high, which keeps demand down whilst you pick up yield and production capacity.
3) A 1.6 is below the initial proposed maximum of 1.8 GHz, which means you still have some headroom to bring out a 1.8 uniprocessor once you have enough chips in the store cupboard and a massive latent demand.
<strong>
If it was me, the machine I'd debut would be a dual 1.6 and I'd keep it there for around 2 months.
Why?
1) A dual 1.6 970 will still blow the pants of any G4 system.
2) By releasing a dual system only, you keep the initial cost high, which keeps demand down whilst you pick up yield and production capacity.
3) A 1.6 is below the initial proposed maximum of 1.8 GHz, which means you still have some headroom to bring out a 1.8 uniprocessor once you have enough chips in the store cupboard and a massive latent demand.</strong><hr></blockquote>
I think the intro-level performance should be a factor of how many fast chips they are getting in the fabs. If the yields of 1.8 GHz are terrific then ship a dual 1.8 GHz machine, if they are louzy then ship a 1.6 GHz machine (or whatever speed the yields are decent for). If the yields are really good at the 1.8 level then you can expect it'll ramp well and quickly beyond the initial 1.8, if they're not this gives Apple a bit of headroom once the 1.8's are plentiful. As a result I think speculating about the details and trying to figure out Apple's thought process behind the introduction is pointless -- their decision will be governed primarily by their supply of components as has always been the case.
<strong>The 970 and the 'companion chip' should appear at the same time. (barring unforseen production problems, of course.)
Apple won't have to scramble to design a chip once they recieve production 970s. They'll already have them.</strong><hr></blockquote>
Yeah, I just saw an IBM .pdf simplified diagram that included the companion chip, and it hit me that they'd have to have one for their own use. Apple could either use IBM's or design their own depending on which suited them best. I still wonder if Apple pi will show up?
<strong>"They are working on software so that 2 processors will work seamlessly like 1." If that is true, then why wouldn't they have just asked IBM to make an actual (dual core) Power4 with the Altivec unit???</strong><hr></blockquote>
I don't have the actual manufacturing yeilds or # of chips per wafer, but here's how it goes:
I make a 'wafer' which is as many 'chips' as possible wedged onto it. Say that's 20 single core chips.
There are ten defects -> _10_ survived. I can make 5 "Dual CPU" macs out of it.
A dual core is roughly double in size to a single core CPU. Yes, 2 singles should operate _very_ similar to one dual core. But. They're twice as large in chip area.
So that same wafer could only have 10 dual-core chips. But there's still going to be _10_ defects. If the defects were evenly distributed there'd be _zero_ usable dual core chips that survive. That really sucks.
My numbers are completely fake, but you can see that at least sometimes '2 single core CPUs' are prefered to aiming for dual core CPUs. When successrates are very high (meaning defects are very low) it starts getting useful to consider dual cores... or more. For the Power4, which is normally a dual-core chip, IBM does make boxes out of 'defective' ones, where one core tests out fine, and the other core is dead. A dual core chip saves quite a bit on complexity/wiring/motherboard issues, but it also concentrates the heat problems.
So there is a balancing act between 'which is better'.
<a href="http://www.bayarea.com/mld/mercurynews/business/technology/5107216.htm"; target="_blank">http://www.bayarea.com/mld/mercurynews/business/technology/5107216.htm</a>;
Basically....Key Research got funding to make 64-bit servers running the Linux OS (inexpensive). They don't reveal what processor will be implemented, but will be released in the 2nd 1/2 of the yr. Perhaps they will be another 970 customer??
"Rosenthal declined to say what chips the company would use, but he said the company will rely on low-cost alternatives to the Itanium. Rosenthal said the company would reveal more about its machines later and will launch them in the second half of 2003."
<strong>
Not a problem for IBM, they already deal quite effectively with it. They manufacture both dual and single core versions of the Power4, the single core versions are just a dual core that tests as a single core failure and is then laser isolated to generate a single core sellable chip.</strong><hr></blockquote>
Uh, did you not read his post?
[quote] For the Power4, which is normally a dual-core chip, IBM does make boxes out of 'defective' ones, where one core tests out fine, and the other core is dead. <hr></blockquote>
.....First off Crolles, the facility you speak of is a R&D center first and foremost.....<hr></blockquote>
I don't know how the Crolles facility got brought into this? If I remember correctly, the Motorola press release concerning high end processors ,manufactured at the end of 2002 using a 0.09µm or 0.10µm process, mentioned an Asian or Southeast Asian facility.
Then again, I could have dreamt the whole thing, since I can no longer find the press release.(Now I'm even getting confused as to whether they mentioned 0.090 or 0.10µm, they release so much #@$^ and never meet their dates, it's vexing.)
0.09µm, 0.10µm phooeey they forgot 0.15µm ... oh great googly moogly, I forgot they changed the size of their rulers/micrometers, whatever, so actually the 0.18µm was really actually 0.15µm, when in fact I thought it was truely 0.22µm. Anyway, was Motorola involved the Mars explorer that missed because different units of measure were co-mingled?
Bottom line, Motorola ain't shipped 0.13µm let alone 0.10µm or 0.090µm parts and don't expect them soon. @#!^$*&%$#*
damn, now what did I do with that bottle of lithium tablets.....???? Oh well, found my prozac.
[ 02-06-2003: Message edited by: rickag ]
[ 02-06-2003: Message edited by: rickag ]
I just noticed in the above rant, I continually wrote 0.9µm instead of 0.09µm, please forgive this adled brain of mine. Kind of funny though, having Motorola going backwards by a factor of 9X's in die size.
[ 02-07-2003: Message edited by: rickag ]</p>
<strong>
I think the intro-level performance should be a factor of how many fast chips they are getting in the fabs. If the yields of 1.8 GHz are terrific then ship a dual 1.8 GHz machine, if they are louzy then ship a 1.6 GHz machine (or whatever speed the yields are decent for). If the yields are really good at the 1.8 level then you can expect it'll ramp well and quickly beyond the initial 1.8, if they're not this gives Apple a bit of headroom once the 1.8's are plentiful. As a result I think speculating about the details and trying to figure out Apple's thought process behind the introduction is pointless -- their decision will be governed primarily by their supply of components as has always been the case.</strong><hr></blockquote>
You and I are probably not that far apart on this issue, the only fundamental difference being that my position pre-emptively seeks to make a 1.6 (or something similar that isn't quite the bleeding edge) the engine for a dual-processor system rather than just saying "let's wait and see whether we can get out enough 1.8s (or whatever defines the edge of the envelope) and then define the product/marketing development accordingly".
That said, if the process starts to reliably churn out 1.8s and you knew that was happening early enough - say June - then you could take a more relaxed view with the aim of pushing out a launch for some initial low-end units sometime in October, shipping for Thanksgiving, followed by another "buckle up" display of the "The Fastest (two-way, 64-bit) Machine You Can Buy For $3000" at MWSF '04 and - with any luck - an innvovative rack-mounted 4-way 1.6 at NAB 04.
All of this should just about keep the favourable column inches rolling for about six-eight months which will just about cover the fact that there may not be a summer show in '04.
<strong>
You and I are probably not that far apart on this issue, the only fundamental difference being that my position pre-emptively seeks to make a 1.6 (or something similar that isn't quite the bleeding edge) the engine for a dual-processor system rather than just saying "let's wait and see whether we can get out enough 1.8s (or whatever defines the edge of the envelope) and then define the product/marketing development accordingly".
That said, if the process starts to reliably churn out 1.8s and you knew that was happening early enough - say June - then you could take a more relaxed view with the aim of pushing out a launch for some initial low-end units sometime in October, shipping for Thanksgiving, followed by another "buckle up" display of the "The Fastest (two-way, 64-bit) Machine You Can Buy For $3000" at MWSF '04 and - with any luck - an innvovative rack-mounted 4-way 1.6 at NAB 04.
All of this should just about keep the favourable column inches rolling for about six-eight months which will just about cover the fact that there may not be a summer show in '04.</strong><hr></blockquote>
Its been standard practice for Apple to decide on the exact processor speeds at a very late date before introduction of the machines. They've had to do this a lot with Motorola's track record.
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Its been standard practice for Apple to decide on the exact processor speeds at a very late date before introduction of the machines. They've had to do this a lot with Motorola's track record.</strong><hr></blockquote>
No argument on this, but in reality that's why you would pre-emptively aim to deliver behind the bleeding edge - it's a psychology thing, I promise myself and aim to deliver something I know is within my grasp. Then, if my supplier turns out to be capable of walking the walk, I know I have somewhere to go within three months which keeps the product "hot" in the marketplace.
Genuinely, Programmer, I'm not looking for an argument here; I'm just putting forward a different way of bring 970 to the marketplace (under promise, then over deliver at regular intervals) so that we can spend the next three to five years continually moving the bar on the Wintel community. Let Dell and HP eat some crow for a while, it's only fair.