XBox 360 PPC = Powerbook G5
3 cores, all with VMX, lotsa onboard cache... doesn't this sound a lot like the multiple PPC440 core design widely speculated upon a long while back?
I see people getting spastic at the notion that M$ could get a multicore PPC before Apple, but no one has really stopped to think about it. How power hungry would THREE PPC970 cores, at THREE POINT TWO GHZ, actually be? It's more likely that this PPC is based on something else.
I see people getting spastic at the notion that M$ could get a multicore PPC before Apple, but no one has really stopped to think about it. How power hungry would THREE PPC970 cores, at THREE POINT TWO GHZ, actually be? It's more likely that this PPC is based on something else.
Comments
Originally posted by Matsu
3 cores, all with VMX, lotsa onboard cache... doesn't this sound a lot like the multiple PPC440 core design widely speculated upon a long while back?
I see people getting spastic at the notion that M$ could get a multicore PPC before Apple, but no one has really stopped to think about it. How power hungry would THREE PPC970 cores, at THREE POINT TWO GHZ, actually be? It's more likely that this PPC is based on something else.
But I thought everyone has agreed that MS was using the G5 for its next Xbox? No?
I'm sure if these were g5's IE 970 processors, apple would have them. Perhaps the Xbox 360 won't ship for 6+ months... which would give time for production. Very interesting though.
Of course no one that knows is talking about the PPE's reall power usage nor how power would average out over several cores. So it is difficult to say just what the power disapation of a triple core PPE based chip would be. On the other hand with the proper technology applied I could see this as a reasonably cool chip.
Dave
Originally posted by Matsu
How power hungry would THREE PPC970 cores, at THREE POINT TWO GHZ, actually be? It's more likely that this PPC is based on something else. [/B]
Originally posted by emig647
I'm sure if these were g5's IE 970 processors, apple would have them. Perhaps the Xbox 360 won't ship for 6+ months... which would give time for production. Very interesting though.
Spot on, there. "MTV: Xbox 360 coming in November"
Gamespot
Perhaps we'll see multicore G5s (in desktops, at least) around the September/October time... Though with the addded demand from the Xbox 360 (and PS3?), any slowdown in production probably lead to something like the dearth of dual 2.5ghz machines Apple ran into earlier this year.
The processor that is being developed for the Xbox 360 is a derivative of the cell processor that is going to be used in the Playstation 3.
The Xbox silicon is merely 3 PPE cores with no SPEs.
For reference, the Cell chip consist of 1 PPE (Power Processing Element)
and probably 4-8 SPE's (Synergenec Processing Elements)
A PPE is basicly a very basic, power pc processor with a lot of pipeline stages (more than a P4) so that it can run at very fast speeds (4.6 GHz in the case of the PS3) It will also support symetric multithreading (aka Hyperthreading:Intel) What it lacks is the Out of Order Execution logic which is present in the G5, P4, and Athlon etc... Without this logic the PPE will perform at a drasticly less impressive level per ghz than the competition.
There has been speculation that the PPE (or dual core PPE) will be used in the next major revision of the powerbook. But this all depends on it's general purpose performance and also it's thermal and power characteristics.
I think there will be atleast one, if not more g4 revisions of the powerbook. If motorola can ramp up it's 90nm process then these machines could be worth buying.
Jason
Originally posted by jason166
You guys are so clueless it's almost funny.
Add to that the fact that the cell can handle 2 instructions per cycle compared to the G5s 8 instructions. That is what Fishkill is for, custom fabs. Anyone can build one, with enough cash. Apple can build one there too, if they want to sink the dough into it.
Originally posted by jason166
You guys are so clueless it's almost funny.
The processor that is being developed for the Xbox 360 is a derivative of the cell processor that is going to be used in the Playstation 3.
Who is clueless?
Originally posted by jason166
There has been speculation that the PPE (or dual core PPE) will be used in the next major revision of the powerbook. But this all depends on it's general purpose performance and also it's thermal and power characteristics.
Although all this are questions waiting for an answer, from what it is publicly available, it is rather clear that a high clocked PPE would perform better than today's G4. Throw it a couple of SPEs and you are done with multimedia (especially HD) and other intensive parallel processing. We just don't know where IBM and Apple are heading with that.
I think there will be atleast one, if not more g4 revisions of the powerbook. If motorola can ramp up it's 90nm process then these machines could be worth buying.
Jason
I agree that's almost a given. The 7448 is due this autumn, and this too would be a substantial improvement over the 7447B we have today.
Originally posted by Rhumgod
Add to that the fact that the cell can handle 2 instructions per cycle compared to the G5s 8 instructions. That is what Fishkill is for, custom fabs. Anyone can build one, with enough cash. Apple can build one there too, if they want to sink the dough into it.
The G5's five instructions per clock... peak. If code does not follow a fairly strictly constrained instruction pattern, fewer than 5 instructions per clock can added to the dispatch queues. The rate of 8 instructions/clock that is often mentioned is how fast queued instructions can be issued to the core, and is higher than the rate on the input side so that it can catch up when stalls or instruction cracking happens. In reality the gating factor to performance is how fast groups (of 5 or fewer) are introduced to the queues... and this is usually 2-4 instructions/clock, depending on the pattern of instructions. This means that the PPE core in the Cell can consume instructions at roughly half the rate of the 970 (not one quarter).
Originally posted by Programmer
The G5's five instructions per clock... peak. If code does not follow a fairly strictly constrained instruction pattern, fewer than 5 instructions per clock can added to the dispatch queues. The rate of 8 instructions/clock that is often mentioned is how fast queued instructions can be issued to the core, and is higher than the rate on the input side so that it can catch up when stalls or instruction cracking happens. In reality the gating factor to performance is how fast groups (of 5 or fewer) are introduced to the queues... and this is usually 2-4 instructions/clock, depending on the pattern of instructions. This means that the PPE core in the Cell can consume instructions at roughly half the rate of the 970 (not one quarter).
Sure, I was just referring to the G5 white paper on Apple's site, which details Up to eight instructions per clock cycle are fetched from the L1 instruction cache for decoding.
Also detailed in that white paper, By tracking groups rather than individual instructions, it can manage up to 100 instructions within the core simultaneously, in addition to 100-plus instructions in the various fetch, decode, and queue stages, for a total of 215 in-flight instructions.
Not sure what the cell is capable of in that regard.
Originally posted by Programmer
This means that the PPE core in the Cell can consume instructions at roughly half the rate of the 970 (not one quarter).
Half the rate per clock cycle, of course, which is where the very high clock speeds of the PPE come in.
The G4 has very feeble OOE capabilities (24 scalar instructions in flight; AltiVec is purely in-order), so the PPE's limitation is not an unfamiliar problem for the platform. The G4 also has relatively primitive branch prediction. The difference is that the G4 has a shallow pipeline, so the penalty for misprediction is low. But the PPE is (slightly asymmetric) SMT, the the penalty for misprediction in one thread is an opportunity to get work done for the other thread—as long as there is work to be done in one of the two threads, the PPE runs efficiently.
I think I remember IBM (in the context of discussion the SMT implementation in POWER5) mentioning that the resources of the POWER4 and 970 were used at about 40%-50% efficiency on average code. That's a lot of thumb-twiddling.
I don't think there's any question that Apple will order up their own variant(s) of this architecture. In fact, it wouldn't surprise me if IBM's agreements with MS, Nintendo and Sony left them with no other option.
Also detailed in that white paper, By tracking groups rather than individual instructions, it can manage up to 100 instructions within the core simultaneously, in addition to 100-plus instructions in the various fetch, decode, and queue stages, for a total of 215 in-flight instructions.
Not sure what the cell is capable of in that regard.
The Cell is in order, so the (max) number of instructions in flight for a PPE is pipeline length * pipeline width, possibly less, depending on issue rates and instruction mix.
Originally posted by Programmer
The G5's five instructions per clock... peak.., fewer than 5 instructions per clock can added to the dispatch queues. .
... and this is usually 2-4 instructions/clock, depending on the pattern of instructions. This means that the PPE core in the Cell can consume instructions at roughly half the rate of the 970 (not one quarter).
Interesting. Just wondering if you could hazard a guess as to the probability that a cell processor could maintain it's theoretical peak of 2 instructions per clock?
Originally posted by Rhumgod
Add to that the fact that the cell can handle 2 instructions per cycle compared to the G5s 8 instructions.
I don't know, but beyond3d talks about a newer CELL version where the PPE can issue 4 instructions per cycle, compared to 2 instr./cycle for the original prototype.
IBM is not doing the manufaturing of the Xbox CPU, MS has contracted TSMC for the manufacture of the silicon. This can only mean very very good things for the possibility of a G5 powerbook. One is IBM will not be obligated to manufactuer CPUs for MS, preventing Apple from getting squeezed out of chips if the xbox yield/demand are bad/good. The second is that they are able to make a 3.2Ghz(x3!!!) PPC cpu for an embedded device (i.e. no burning hot Intel/AMD/current 970 cpus) by the end of the year. We will find out more details tomorrow, but it seems IBM/MS/TSMC are confident they will be able to ship large quantities of this part at 65nm(and/or some other great proccess tricks) by the mid/end of the year.
If they are able to manufatuer these, dropping down the clock, and removing a core(or 2), is just a hop skip and a jump away from making a G5 fit in the power envelope required for a good laptop CPU. I have to agree with Matsu, this is some of the most encouraging facts we have heard to date regarding IBMs CPU offerings that Apple would be stupid to pass up on. This is going to be a big year in the multi-core CPU world, with AMD moving all dual, Intel playing catch-up, and IBM sitting pretty as the world catches up to them. On top of that we have the new manufaturing improvements that are due this year. Its been a long wait for something better after the first 970, hold on to your hats its going to be a wondorful ride as the CPU industry finally gets out of the doldrums its been stuck in the last few years. I won't be holding my breath for a Powerbook G5 @ WWDC, but we are definitly going to see some new CPU loving in the powerbook at the later half of this year, at the least.
Originally posted by crobin
If they are able to manufatuer these, dropping down the clock, and removing a core(or 2), is just a hop skip and a jump away from making a G5 fit in the power envelope required for a good laptop CPU. I have to agree with Matsu, this is some of the most encouraging facts we have heard to date regarding IBMs CPU offerings that Apple would be stupid to pass up on. This is going to be a big year in the multi-core CPU world, with AMD moving all dual, Intel playing catch-up, and IBM sitting pretty as the world catches up to them. On top of that we have the new manufaturing improvements that are due this year. Its been a long wait for something better after the first 970, hold on to your hats its going to be a wondorful ride as the CPU industry finally gets out of the doldrums its been stuck in the last few years. I won't be holding my breath for a Powerbook G5 @ WWDC, but we are definitly going to see some new CPU loving in the powerbook at the later half of this year, at the least.
The cpu going into the xbox is no where near as capable as the 970fx. It would probably be as powerful as a current G4, system wide funtionality considered.
Originally posted by crobin
Geez, I can't believe how badly this thread as devolved... The Xbox 360 _is not_ a cell proccessor, the only relation to the cell is its IBM/PPC lineage. The closest relative to this CPU today is the 970, while the CELL can only claim really about 1/8th 970 heritage.
Granted, Waternoose (Xbox 360 processor) is no Cell processor, since it probably won't be compatible with STI's software CELL architechture and SPUs.
BUT.. the three cores in Waternoose and the PPE core in STI's Cell is quite similar in a lot of respects. They both are processors relying on long pipelines to get high frequenzies, two way multi threading, DRM on die, VMX attached, integrated memory controllers, small shared caches and high speed inter core communications.
Without any real proof I'd say that Waternoose and Cell uses _the_same_ core, but with custom design with a lot of different add ons that make then distictly different. Waternoose is as similar to 970 as any other PowerPC is. They have three things in common: They are both 64 bit, have VMX and are PowerPCs. Other than that.. not much.
Originally posted by Rhumgod
The cpu going into the xbox is no where near as capable as the 970fx. It would probably be as powerful as a current G4, system wide funtionality considered.
If I correctly interpret what Programmer said a while back, the Cell's PPE core is roughly half as fast as the 970FX, at the same clock rate. If Waternoose uses this same core, it should perform as good or a little better than a 970FX, considering it has 3 cores. The 970MP should be superior however.
It's interesting to do a little guessing. If the Xbox3 ships in November, then Waternoose is likely on a 90nm process, with 3 cores. These cores surely run much cooler than the 970FX core. Possibly 2 of these cores with built-in memory controller could soon be a chip to replace the G4 in Macs.
Originally posted by crobin
Geez, I can't believe how badly this thread as devolved... The Xbox 360 _is not_ a cell proccessor, the only relation to the cell is its IBM/PPC lineage. The closest relative to this CPU today is the 970, while the CELL can only claim really about 1/8th 970 heritage. This is far different thaqn a 750/440 based core, but instead is a 64-bit/VMX design.
Given that the original post in the thread proposed that the Xbox 360 was similar to the multiple-440-core rumors, I'd say that it has evolved. Sorry, Matsu.
There is not a shred of evidence that the PPE (the PowerPC core used in the XBox and also in Cell) is descended from the POWER4/970 lineage. It's the first product in a family that IBM has been working on for some years now, whose first public appearance was the 1GHz integer-only core that IBM debuted some 5 years ago. Unlike the 970, it has: No OOE capability; asymmetrical SMT; even deeper pipelines; weak (or no) branch prediction; narrow (2 instruction) dispatching without the POWER5/970's novel "grouping" mechanism; etc. It's a completely different design, philosophically. They're both 64 bit IBM PowerPCs with AltiVec, but that's all they have in common.
If they are able to manufatuer these, dropping down the clock, and removing a core(or 2), is just a hop skip and a jump away from making a G5 fit in the power envelope required for a good laptop CPU.
On 65nm design rules, a single PPE core should have an attractive heat and cost profile for a PowerBook. Downclocking PPEs is perilous, though, because their performance depends on a high clock speed. For instance, they only approach the 970's instruction processing rate at double the clockspeed. Meanwhile, Freescale is about to remove the G4's bus bottleneck. Without that, and with 64 bit support (also on the menu) and a dual-core variant (coming) it will be a difficult competitor at low wattage (12W and below). Freescale's major advantage here is that they've had years to hand-tune and hand-refine this core.
The ace up IBM's sleeve is the SPE. IBM's shipping eight of them hooked up to a PPE for Cell; Apple could ask for some smaller number of SPEs, or for two PPEs instead of three, and so forth. They could have different configurations between different lines (although I imagine they'll want to do some sharing—between the PowerBook and the iMac, say—in order to reap economies of scale). IBM's design shop in Fishkill is all set up to do this kind of work.
I have to agree with Matsu, this is some of the most encouraging facts we have heard to date regarding IBMs CPU offerings that Apple would be stupid to pass up on. This is going to be a big year in the multi-core CPU world, with AMD moving all dual, Intel playing catch-up, and IBM sitting pretty as the world catches up to them.
It might not play out quite that rosily for IBM (they made some pretty grand claims for the 970, too). It would be more likely that IBM, AMD and Intel all move to dual-core within months of each other, with Freescale not far behind.
The benefits from process improvements are shrinking rapidly. At this point, nobody expects significant power savings (or enhanced clock speed) from the transition to 65nm. You get more chips per wafer, which means cheaper chips (yields being equal—and yields on 90nm were initially dismal, so there's no reason to expect they'll start out good on 65nm either). Unless some engineer somewhere gets really lucky and breaks through a wall, I wouldn't expect much here.
I also wouldn't expect any of this to hit the PowerBook until WWDC '06, or after. The next good CPU for the PowerBook, yields willing, is the Freescale 7448, due in the second half of this year.
Originally posted by Amorph
.On 65nm design rules, a single PPE core should have an attractive heat and cost profile for a PowerBook. Downclocking PPEs is perilous, though, because their performance depends on a high clock speed. For instance, they only approach the 970's instruction processing rate at double the clockspeed. Meanwhile, Freescale is about to remove the G4's bus bottleneck. Without that, and with 64 bit support (also on the menu) and a dual-core variant (coming) it will be a difficult competitor at low wattage (12W and below). Freescale's major advantage here is that they've had years to hand-tune and hand-refine this core.
It might not play out quite that rosily for IBM (they made some pretty grand claims for the 970, too). It would be more likely that IBM, AMD and Intel all move to dual-core within months of each other, with Freescale not far behind.
Freescale is going to let all and sundry in on their plans next month. Check this first link out:
https://getregisterednow.com/FTF/Ses...edule.aspx?t=4
This is from the Freescale Tech Forum agenda, Network section. Plenty mentions of MPC 7448 and 8641D.
On a related point, they have got 90nm worked out to the point where they're producing MSC8126 Starcore DSPs at present.
Anybody for 7448 Powerbooks in Paris?