tenthousandthings

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  • Apple is unsurprisingly already working on A19 and M5 chips

    Same question as Ellie who posted this on Double-Struck X, if 6012 is M1 Ultra and 6022 is M2 Ultra, then 6032 is M3 Ultra, but what are 6033 and 6034?

    I think it's possible there is a twist coming as a result of the failure of the 4x Max (4C "Extreme") approach. I've argued (maybe, certainly, kind of far-fetched, and feel free to disagree) elsewhere in the forums that a four-GPU variant of the Pro/Max (one-GPU/two-GPU) progression might be in the works, which would then be doubled using the same tech as the Ultra. So 6033 would be my "Max+" and 6034 would be my "Ultra+"  ...

    Another possibility is that 6033 and 6034 are about TSMC N3E. So M3 Pro and M3 Max, but via N3E instead of N3 ("N3B").

    Another interesting question stems from the numbers for the A15 and M2 (8110 and 8112), so if 8120 is A16, then what is the 8122 listed there? M3? No, because if M3 is based on A17 (8130), then it would be 8132.
    watto_cobraFileMakerFeller
  • Mac Pro in danger after fumbled Apple Silicon launch

    The real question is will Apple produce a high-end version of this Mac Pro? Right now, the only available version is entry-level, with silicon that overlaps with the high-end Mac Studio. There is no high-end Mac Pro.

    The silicon would have to go beyond the Ultra. Beyond the beyond (ultra means "beyond"). Apple has said enough to make it clear that they did design such a tier, but it's not clear what that was. All that is known is that it was aborted and its code name might have been Jade 4C-Die.

    But there are some things that we can surmise:

    #1 is that killing Jade 4C-Die wasn't a financial decision, it was about performance. It didn't give them what they were looking for at the high-end Mac Pro starting price of $14K (i.e., double the entry-level price, like the Mac Studio). My assumption is that the reality of the fundamental limits in M1/M2 graphics performance meant its time had not come.

    #2 is that Unified Memory is here to stay. Whatever Jade 4C-Die was, and whatever it will become, it will be built around the principle of Unified Memory.

    #3 is that we should take the commitment to PCI Express at face value. PCIe 5 (and Thunderbolt 5) is a big step forward, and the PCIe 6 specification is also now complete. Those designs are sitting on engineering drawing boards right now. An M3 Ultra Mac Pro with PCIe 5 will be a big step beyond the M2 edition. But that would still be the entry-level Mac Pro. We'll just have to wait and see if and when they go beyond that. It really depends on what they do with the M3 Pro/Max graphics. 
    williamlondondanoxwatto_cobra
  • M3 roadmap speculation hints at next Apple Silicon generation chips

    Marvin said:

    The M3 Pro's base configuration is anticipated to have 12 CPU cores, again split evenly between performance and efficiency cores, and an 18-core GPU. The top configuration will use add two more performance cores, bringing the total to 14, as well as a 20-core GPU.

    The M3 Max will start with a base configuration of 16 CPU cores, using 12 performance and four efficiency cores, and a 32-core GPU. On the high end, the M3 Max will have the same 16-core CPU but a 40-core GPU.

    I'd expect the 12-core M3 Pro to be 8 performance-cores, it would be unusual to have 6 efficiency cores on Pro and 4 on Max. Plus M2 Pro 10-core already has 6 performance cores, 4 efficiency. Moving to 6p/6e only increases the efficiency cores. 8p/4e would increase CPU performance at least 50%.

    The GPU core counts look like a small increase so I'd say they will increase transistor count per core:

    https://wccftech.com/apple-a10-fusion-cores-bigger-than-competition/

    "One reason why Apple is adamant is designing larger cores is because having more transistors per core helps when performance and efficiency per-watt metric is calculated. While this might not be a good approach when conserving space, clock efficiency greatly increases thanks to these decisions."

    They might also have a strategy similar to Intel's tick-tock. 2nm won't be ready until late 2025/2026 so they have to make 3nm last for 2023/2024/2025. I doubt they would throw everything in with the first 3nm revision then have a small refresh in 2025. It's best to split it so that each refresh has a worthwhile improvement (~50% increase each time) so that M4 (2025) is 2x M2 performance.
    Speaking of transistors, TSMC is staggering the full 3nm transition over N3 and N2. The first phase is the die shrink. N3/N3E and N3P (N3+) transistors are still FinFET-based, which TSMC has been using since 16nm (2013).

    However, N3 and N3P are the last two generations of FinFET. To move beyond 3nm, the industry has adopted GAAFET (GAA = gate all-around, FET = field effect transistor), which TSMC calls "Nanosheet" transistors. I'm pretty sure I remember TSMC said in their initial press release they would do both things at the same time, the [1] die shrink and the [2] change in transistor architecture. That is what Samsung has done, with success, at least with regard to focused cryptocurrency-mining silicon. See TechInsights on this topic, here: https://www.techinsights.com/disruptive-event/samsung-3nm-gaa-process
    But TSMC won't start using Nanosheet (GAAFET) transistors until N2 and N2P.

    So N3 (and the more mainstream N3P refinement after it) isn't as radical a shift as was first thought. Right now, Apple can increase the number of transistors per core, as you suggest, without having to worry about the FinFET-to-Nanosheet transition as well. 

    Here is a recent Anandtech article that provides a bit more context: https://www.anandtech.com/show/18960/samsung-foundry-s-3nm-and-4nm-yields-are-improving-report
    muthuk_vanalingamtmayFileMakerFellerwatto_cobra
  • Ming-Chi Kuo says Apple's 'sweetheart deal' with TSMC is no such thing

    This makes perfect sense. Apple has always been on the front edge of TSMC’s processes, from the A8 (iPhone 6, first-generation 20nm) on. There was an experiment with dual-sourcing for the A9 (iPhone 6S) using an established Samsung process alongside the TSMC first-generation 16nm process. But they haven’t done that since, for whatever reason. A12/A12Z (N7), A14/M1 (N5), and now A17/M3 (likely N3) all on the front edge of TSMC.
    Alex1Nwatto_cobra
  • Apple Silicon Timeline (past and future)

    I think the odds of a significant GPU revision are more likely in M3 than you think, primarily because it was initially aimed to happen in the M2 generation but wasn't ready in time.  They've had quite a long time to work on it, and there is a lot of market pressure to get it into product.
    Someone (Mjtomlin) proposed in the M3 thread that the delay was caused by problems integrating Imagination Technologies' tile-based rendering designs into the GPU. I believe it was you who first pointed out the importance of tile-based rendering here with regard to what Apple is doing in its silicon, in contrast to most other GPU architectures.

    We do know that Imagination (now owned by China, but still a British company) signed a new licensing deal with Apple in 2020, but that might have just been about ongoing or past use of their IP, and not future implementations.
    programmer