The big identical rectangles are cache. The ones at the top are the biggest and thus probably L2. The rectangles in the middle are smaller and fewer in number, so they make up L1 cache. Branching and Load&Store tend to be in the middle of the chip, probably to the left of the L1. The rest of the stuff is somewhere else
]
We can notice also that there is two group of 16 rectangles of 16 K each for a total of 512 KB (16 *2*16) for the L2 cache.
The small rectangles are the quarter of the size of the large ones. Meaning that each is 4KB, so there is a total of 32 KB of L1 cache.
The small rectangulars patterns in the bottom are the units, integer, fpu ... Good luck with the others features ...
IBM must be very confident of these chips if they let the public view photos such as these. . .
If there were no photos, I suspect that as soon as the 970 is in a product that Intel would have one opened up and under the microscope. So, it's not giving away any secrets this close to product output. We will not see photos of the 980 for quite some time however.
1 gig G4 say vs 1 gig 970. Average of both makes the 970, per clock, 'twice as fast'.
:?
Anybody rendering Lightwave pics on a 1 gig G4 iMac2 is going to be in for a shock when they see a 1.8 gig dual 970 Tower blow the current G4 away.
At a single 1.8 970. That's what? Four-five times the fpu performance. Then...put that in duals. A dual 970 at 1.8 gig could have 10 times the FPU power of a 1 gig G4?
Add in bandwidth and VPU.
Whether it works out like that in practice. But even a single 970 at 1.8 being a 'modest' 3 times faster than a 1 gig G4 would be amazing. Dual that and a 'modest' 6 times performance improvement.
Don't know about you guys...but that should really trim those Final Cut Pro and Lightwave rendering times.
If this 'Beast' can't throw around the 'X' 'Mac' finder than nothing can.
Sorry LBB, not to pick on you spesifically, but I just feel like correcting VPU to VU (Vector Unit), VMX, Velocity Engine, or Altivec, before VPU gets commonly used wrongly, As said, VPU is the Vector Permute Unit, and a small (but crucial) part of altivec.
But yes, you might experience 10 times the FP-performance of the 1GHz G4, on a dual 1.8 970. Very well too
Oh, and never underestimate the ability of having 200 instructions in flight, and deeeeep OOOE, which will have a tremendous effect on badly optimised code output from the gcc-compiler (yep, the one that Apple uses).
I'm not sure what the VR1 and VR2 units are, but they're part of altivec too.[/B]
Vector register units 1 and 2.
Why are there two? If you read Hannibal's excellent article on the PPC970 (part II), you can see why. In fact, parts 1 and 2 are recommended, or even required, reading before discussion about the PPC970.
Comments
Originally posted by OverToasty
So they hired Suze Randall to spice things up a bit: no biggie.
Originally posted by wfzelle
The big identical rectangles are cache. The ones at the top are the biggest and thus probably L2. The rectangles in the middle are smaller and fewer in number, so they make up L1 cache. Branching and Load&Store tend to be in the middle of the chip, probably to the left of the L1. The rest of the stuff is somewhere else
]
We can notice also that there is two group of 16 rectangles of 16 K each for a total of 512 KB (16 *2*16) for the L2 cache.
The small rectangles are the quarter of the size of the large ones. Meaning that each is 4KB, so there is a total of 32 KB of L1 cache.
The small rectangulars patterns in the bottom are the units, integer, fpu ... Good luck with the others features ...
Originally posted by Paul
where is altivec?
VPU
Originally posted by Carson O'Genic
IBM must be very confident of these chips if they let the public view photos such as these. . .
If there were no photos, I suspect that as soon as the 970 is in a product that Intel would have one opened up and under the microscope. So, it's not giving away any secrets this close to product output. We will not see photos of the 980 for quite some time however.
Originally posted by alex_kac
VPU
So little and yet so powerful
Originally posted by alex_kac
VPU
No, altivec is more than just the VPU. VPU is only the Vector Permute Unit. Consider all the units at the bottom of the picture the altivec units.
VISU = Vector Instruction Scheduler Unit
VFPU = Vector Floating Point Unit
VCIU = Vector Complex Integer Unit
VSIU = Vector Simple Integer Unit
(I think)
I'm not sure what the VR1 and VR2 units are, but they're part of altivec too.
The big red box is the unchanged Power4 core.
Originally posted by alex_kac
VPU
Not exactly. VPU is the vector permute unit.
Altivec is VPU + VR1 + VR2 + VFPU + VSIU + VCIU + VISU
Edit: Zapchud just beat me to it.
VR1 and VR2 are two copies of the vector register file.
michael
3.12 outperforms the G4 per clock on FPU.
1 gig G4 say vs 1 gig 970. Average of both makes the 970, per clock, 'twice as fast'.
:?
Anybody rendering Lightwave pics on a 1 gig G4 iMac2 is going to be in for a shock when they see a 1.8 gig dual 970 Tower blow the current G4 away.
At a single 1.8 970. That's what? Four-five times the fpu performance. Then...put that in duals. A dual 970 at 1.8 gig could have 10 times the FPU power of a 1 gig G4?
Add in bandwidth and VPU.
Whether it works out like that in practice. But even a single 970 at 1.8 being a 'modest' 3 times faster than a 1 gig G4 would be amazing. Dual that and a 'modest' 6 times performance improvement.
Don't know about you guys...but that should really trim those Final Cut Pro and Lightwave rendering times.
If this 'Beast' can't throw around the 'X' 'Mac' finder than nothing can.
Lemon Bon Bon
Originally posted by Lemon Bon Bon
Add in bandwidth and VPU.
Sorry LBB, not to pick on you spesifically, but I just feel like correcting VPU to VU (Vector Unit), VMX, Velocity Engine, or Altivec, before VPU gets commonly used wrongly, As said, VPU is the Vector Permute Unit, and a small (but crucial) part of altivec.
But yes, you might experience 10 times the FP-performance of the 1GHz G4, on a dual 1.8 970. Very well too
Oh, and never underestimate the ability of having 200 instructions in flight, and deeeeep OOOE, which will have a tremendous effect on badly optimised code output from the gcc-compiler (yep, the one that Apple uses).
Originally posted by Lemon Bon Bon
If this 'Beast' can't throw around the 'X' 'Mac' finder than nothing can.
Imagine how insanely fast the beachball will spinn with a dual 1.8 970
Originally posted by AirSluf
A little less shotgun please? I was worried I gooned it up for a couple minutes... Whew!
I agree it is difficult to keep track of what is coming from where and who though, unless you keep up all over the place.
Keeping you on your toes, am I?
Originally posted by spotcatbug
I want to know: what does it look like with orange, peanut M&M's?
rotfl.
It's so scary. Like one of the IBM execs have a Marv Albert streak that leaked into the workplace.
Originally posted by Zapchud
I'm not sure what the VR1 and VR2 units are, but they're part of altivec too.[/B]
Vector register units 1 and 2.
Why are there two? If you read Hannibal's excellent article on the PPC970 (part II), you can see why. In fact, parts 1 and 2 are recommended, or even required, reading before discussion about the PPC970.
http://arstechnica.com/cpu/03q1/ppc970/ppc970-0.html
Originally posted by Powerdoc
Is it me, or does the VMX unit from IBM looks bigger than the velocy engine from Mot ?
Of course it is -- the pipeline is over twice as long and it has 80 physical registers instead of 48.