The 750-cores and 440-cores will merge in 2004. The rumoured Mojave, aka 750VX, is said to incorporate a VMX unit. But what's not commonly known is that Mojave will share its core with the next generation of 4xx core. This common core is named "Viper" and will be the core of the 7xx Mojave and 4xx Orion. According to roadmaps I've seen Mojave will be here in 2004, and Orion in 2005.
When I first read Nr9's entry my first thought was "Why base it on 440 when the 750 core is so much more powerful?" Then it dawned on me that it'll be essentially the same thing in 2004.
I think the MCM thingy is quite a clever approach. The 440 core has proven to be very versatile and doing a custom design targeted directly at laptops like Nr9 propses might be the best thing to do. It's somewhat similar to what Intel is doing with Centrino.
I do think that Nr9 might be onto something here. Very interessting!
if you look at the top500.org you can see that the 440-based supercomputer needs 4x the number of processors to get the same theoretical peak of 1 PPC970.
if a PowerBook shall come up around the same performance of a single processor 2GHz PPC G5 it must have 4 processors.
2nd i found the following at another website - according to that opinion the 2GHz G5-chip in a 90nm design will be very suitable for a 2GHz PowerBook.
Senior analyst Eric Mantion at InStat/MDR (Scottsdale, Ariz.) said the 1.2-GHz PowerPC 970 consumes 19 watts in 130-nanometer silicon and estimated that a 2-GHz 970 core would consume about 15 W in 90-nm silicon.
adding: and as far as i know the current G5-architecture is planned to be THE architecture for upcoming Macintosh-Systems (i think steve jobs himself told this to the press). this is for cost reasons. would a PPC440-based processor-unit fit into this?
Senior analyst Eric Mantion at InStat/MDR (Scottsdale, Ariz.) said the 1.2-GHz PowerPC 970 consumes 19 watts in 130-nanometer silicon and estimated that a 2-GHz 970 core would consume about 15 W in 90-nm silicon.
Interesting stuff. Now, what is the power consumption of G4's used in current powerbooks?
I'd never have guessed that the PowerBook would be the trailblazer though. That's a bit hard to swallow.
It makes sense though. What computer needs low power, high performance processing in Apple's range as much as the PowerBook?
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Alternatively, would it be possible for EACH CHIP to have a FireWire MAC, an ethernet MAC, a DDR memory controller, a Rapid-I/O controller and a USB 2 controller?
What about the graphics card? Would the MCM include a Rapid-I/O hub, or would the individual chips have 4 interfaces, one each for the 3 other chips, and another for devices which cannot possibly be integrated SoC, like the graphics card (connected through a Rapid-I/O to AGP bridge)?
The idea of a quad-440 isn't impossible to swallow, but that combined with SoC design almost is.
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Something like this?
Is this doable at all? I'm not familiar to the limitations of processor design but this seem to me like one of those clever solutions. When doing heavy AltiVdc stuff, the other processors is free to do other things.. One might even modify this design so that all the cores share the L2 cache.
There must be some kind of cool dispatch unit too so all of this is handled in an orderly fashion. Could it even be made so that this MCM is adressed as one CPU by the operating system but four way hyperthreaded?
MY thought is if they are going MCM approach then all of your I/O would be handled by one piece of Silicon. It would be entirely possible to have 750 type cores on one piece of silicon, with two of these chips talking to each other and the I/O chip. I still have to wonder if this could ever be cost effective given the cost of MCM technology. I do believe that this could be done with current mother board tehcnology.
IF Apple goes the system on a chip route I believe we are at a point technology wise where 2 750 class processors and all the I/O used in a laptop could be integrated on the chip. The biggest issue is that at some point I/O count itself becomes a problem. I'm not convinced that seperate SOC designs are required or desirable for 4 processors, from the engineering stand point it would be better to selectively disable I/O units not required. But in the context of MCM technology that isn't an issue either as the I/O could be common to all processor modules. So we kinda agree that 4 processor SMP system would be hard to do as SOC, as a MCM it is very possible but expensive.
It should be noted that even 4 processor SOC chips might be possible once the desgn rules fall below .09um. There is also the question of what becomes acceptable die sizes for present technology, the 750 series is rather small compared to Intel and even 970 chips. This is why I believe that dual processor SMP systems are doable today if a largish die is acceptable.
Thanks
Dave
Quote:
Originally posted by Barto
It makes sense though. What computer needs low power, high performance processing in Apple's range as much as the PowerBook?
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Alternatively, would it be possible for EACH CHIP to have a FireWire MAC, an ethernet MAC, a DDR memory controller, a Rapid-I/O controller and a USB 2 controller?
What about the graphics card? Would the MCM include a Rapid-I/O hub, or would the individual chips have 4 interfaces, one each for the 3 other chips, and another for devices which cannot possibly be integrated SoC, like the graphics card (connected through a Rapid-I/O to AGP bridge)?
The idea of a quad-440 isn't impossible to swallow, but that combined with SoC design almost is.
The 440 in thecomplete BlueGene/L will be700 MHz parts. Two cores with two FPUs each on the same die as 4 MB L3 cache and different kinds of conectivity busses (like Gigabit Ethernet). One 440 core consumes a measly 1.5 W, but the MCM in BlueGene/L consumes a total of 12 W (probably mostly due to the very large cache) and peaks at 5.6 GFLOPS. That's compared to the ~60 W and 8 GFLOPS a G5 peaks at.
Is this doable at all? I'm not familiar to the limitations of processor design but this seem to me like one of those clever solutions. When doing heavy AltiVdc stuff, the other processors is free to do other things.. One might even modify this design so that all the cores share the L2 cache.
There must be some kind of cool dispatch unit too so all of this is handled in an orderly fashion. Could it even be made so that this MCM is adressed as one CPU by the operating system but four way hyperthreaded?
Exactly. I know the 440 is supposed to be MUCH cheaper to add-on to than, well, pretty much any other CPU, BUT would it be cheap, and quick, enough?
And wizard69, that's what I would have thought too, but Nr9, who started the thread, says the motherboard design is based on SoC.
This is the BEST thread in Future Hardware in many, many, many months.
Are you sure about this and the PowerBook. Frankly this looks like the technology that should be going into an IBook. Extremely low power and possibly the ability to selectively shut down processor and you have the potential for vey long run times. I can't see this going into the powerbook though, there are just to many variables with respect to performance.
Comments
When I first read Nr9's entry my first thought was "Why base it on 440 when the 750 core is so much more powerful?" Then it dawned on me that it'll be essentially the same thing in 2004.
I think the MCM thingy is quite a clever approach. The 440 core has proven to be very versatile and doing a custom design targeted directly at laptops like Nr9 propses might be the best thing to do. It's somewhat similar to what Intel is doing with Centrino.
I do think that Nr9 might be onto something here. Very interessting!
Originally posted by numerous ill informed people
WOOHOO. G5 powerbooks by january 2004
Originally posted by Nr9
G5 is not design for mobile computing
no matter how small you shrink it it wont work
Hmm. Two month from now or never? Isn´t there, like, a third possibility?
if you look at the top500.org you can see that the 440-based supercomputer needs 4x the number of processors to get the same theoretical peak of 1 PPC970.
if a PowerBook shall come up around the same performance of a single processor 2GHz PPC G5 it must have 4 processors.
2nd i found the following at another website - according to that opinion the 2GHz G5-chip in a 90nm design will be very suitable for a 2GHz PowerBook.
Quote from here:
Senior analyst Eric Mantion at InStat/MDR (Scottsdale, Ariz.) said the 1.2-GHz PowerPC 970 consumes 19 watts in 130-nanometer silicon and estimated that a 2-GHz 970 core would consume about 15 W in 90-nm silicon.
adding: and as far as i know the current G5-architecture is planned to be THE architecture for upcoming Macintosh-Systems (i think steve jobs himself told this to the press). this is for cost reasons. would a PPC440-based processor-unit fit into this?
Originally posted by Krassy
Senior analyst Eric Mantion at InStat/MDR (Scottsdale, Ariz.) said the 1.2-GHz PowerPC 970 consumes 19 watts in 130-nanometer silicon and estimated that a 2-GHz 970 core would consume about 15 W in 90-nm silicon.
Interesting stuff. Now, what is the power consumption of G4's used in current powerbooks?
Originally posted by Amorph
I'd never have guessed that the PowerBook would be the trailblazer though. That's a bit hard to swallow.
It makes sense though. What computer needs low power, high performance processing in Apple's range as much as the PowerBook?
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Alternatively, would it be possible for EACH CHIP to have a FireWire MAC, an ethernet MAC, a DDR memory controller, a Rapid-I/O controller and a USB 2 controller?
What about the graphics card? Would the MCM include a Rapid-I/O hub, or would the individual chips have 4 interfaces, one each for the 3 other chips, and another for devices which cannot possibly be integrated SoC, like the graphics card (connected through a Rapid-I/O to AGP bridge)?
The idea of a quad-440 isn't impossible to swallow, but that combined with SoC design almost is.
Barto
Originally posted by Barto
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Something like this?
Is this doable at all? I'm not familiar to the limitations of processor design but this seem to me like one of those clever solutions. When doing heavy AltiVdc stuff, the other processors is free to do other things.. One might even modify this design so that all the cores share the L2 cache.
There must be some kind of cool dispatch unit too so all of this is handled in an orderly fashion. Could it even be made so that this MCM is adressed as one CPU by the operating system but four way hyperthreaded?
Originally posted by Addison
Would this be faster then the current PowerMacs?
no - i think that 4 ppc 440s (like the ones in BlueGene/L) would have the same speed like one ppc 970 at 2GHz.
but it will not be faster than power mac avaiable when it it release.
the 440's on the top500 are 500Mhz
the PowerBook will use 700
MY thought is if they are going MCM approach then all of your I/O would be handled by one piece of Silicon. It would be entirely possible to have 750 type cores on one piece of silicon, with two of these chips talking to each other and the I/O chip. I still have to wonder if this could ever be cost effective given the cost of MCM technology. I do believe that this could be done with current mother board tehcnology.
IF Apple goes the system on a chip route I believe we are at a point technology wise where 2 750 class processors and all the I/O used in a laptop could be integrated on the chip. The biggest issue is that at some point I/O count itself becomes a problem. I'm not convinced that seperate SOC designs are required or desirable for 4 processors, from the engineering stand point it would be better to selectively disable I/O units not required. But in the context of MCM technology that isn't an issue either as the I/O could be common to all processor modules. So we kinda agree that 4 processor SMP system would be hard to do as SOC, as a MCM it is very possible but expensive.
It should be noted that even 4 processor SOC chips might be possible once the desgn rules fall below .09um. There is also the question of what becomes acceptable die sizes for present technology, the 750 series is rather small compared to Intel and even 970 chips. This is why I believe that dual processor SMP systems are doable today if a largish die is acceptable.
Thanks
Dave
Originally posted by Barto
It makes sense though. What computer needs low power, high performance processing in Apple's range as much as the PowerBook?
In terms of SoC, I totally agree, and is the point I was trying to put through. Would it be cost-effective to have 4 seperate chip designs, each with different MACs and controllers?
Alternatively, would it be possible for EACH CHIP to have a FireWire MAC, an ethernet MAC, a DDR memory controller, a Rapid-I/O controller and a USB 2 controller?
What about the graphics card? Would the MCM include a Rapid-I/O hub, or would the individual chips have 4 interfaces, one each for the 3 other chips, and another for devices which cannot possibly be integrated SoC, like the graphics card (connected through a Rapid-I/O to AGP bridge)?
The idea of a quad-440 isn't impossible to swallow, but that combined with SoC design almost is.
Barto
Originally posted by Nr9
the 440's on the top500 are 500Mhz
The 440 in thecomplete BlueGene/L will be700 MHz parts. Two cores with two FPUs each on the same die as 4 MB L3 cache and different kinds of conectivity busses (like Gigabit Ethernet). One 440 core consumes a measly 1.5 W, but the MCM in BlueGene/L consumes a total of 12 W (probably mostly due to the very large cache) and peaks at 5.6 GFLOPS. That's compared to the ~60 W and 8 GFLOPS a G5 peaks at.
Originally posted by Henriok
Something like this?
Is this doable at all? I'm not familiar to the limitations of processor design but this seem to me like one of those clever solutions. When doing heavy AltiVdc stuff, the other processors is free to do other things.. One might even modify this design so that all the cores share the L2 cache.
There must be some kind of cool dispatch unit too so all of this is handled in an orderly fashion. Could it even be made so that this MCM is adressed as one CPU by the operating system but four way hyperthreaded?
Exactly. I know the 440 is supposed to be MUCH cheaper to add-on to than, well, pretty much any other CPU, BUT would it be cheap, and quick, enough?
And wizard69, that's what I would have thought too, but Nr9, who started the thread, says the motherboard design is based on SoC.
This is the BEST thread in Future Hardware in many, many, many months.
Barto
At least all core needs to have a single FP unit and a VMX unit.
Dave
Originally posted by Nr9
the prototype is 500Mhz
Originally posted by Nr9
it is going to be more faster than the current powerbook
That's always good