Ppc 7448d

Posted:
in Future Apple Hardware edited January 2014
Please don't ask for more detailed information, but take it as a rumor:



Friend of mine works in a Freescale lab developing reference designs for customers of the PPC. He told me they have received a bunch of dual-core PPCs pin-compatible with the 7447. This cannot be prototypes of the MPC8461D, because those are more like SOCs.



Now, would a dual-core 7448D not solve a lot of headaches at Apple? The Powerbooks are aging, the 970fx runs too hot and the Antares is not available - and would require a total redesign if it's thermal characteristics would allow it in a Powerbook at all. Since the MPC8461 and 7448 are both built (afaik) on the e600 core, it would be relatively easy and cheap to develop a 7448D as well.
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Comments

  • Reply 1 of 54
    Quote:

    Originally posted by Smircle

    Please don't ask for more detailed information, but take it as a rumor:



    Friend of mine works in a Freescale lab developing reference designs for customers of the PPC. He told me they have received a bunch of dual-core PPCs pin-compatible with the 7447. This cannot be prototypes of the MPC8461D, because those are more like SOCs.



    Now, would a dual-core 7448D not solve a lot of headaches at Apple? The Powerbooks are aging, the 970fx runs too hot and the Antares is not available - and would require a total redesign if it's thermal characteristics would allow it in a Powerbook at all. Since the MPC8461 and 7448 are both built (afaik) on the e600 core, it would be relatively easy and cheap to develop a 7448D as well.




    The 7448 is a e600 core. Basically what you are saying is that they are going dual e600 without the extra stuff thats on the 8641D, such as IMC and system controller with the RapidIO interface.



    That means they still have a shitty 200Mhz bus connecting them and have the extra energy drains, not only of the system controller but also the extra chip...the three obstacles that Freescale tried to overcome with the whole dual core design in the first place.



    My first reaction to your post is overwhelming scepticism coupled with the interesting point that, even if this has an element of truth about it, IBM could be out of the running for the PB CPU. Cell or PPE can't be cutting the mustard at Cupertino.



    Interesting info regardless...its a change from all the Cell hysteria
  • Reply 2 of 54
    eric_zeric_z Posts: 175member
    Quote:

    Originally posted by Smircle

    Please don't ask for more detailed information, but take it as a rumor:



    [snip]



    Now, would a dual-core 7448D not solve a lot of headaches at Apple?




    I'm thinking that they designed it primarely for the people in the embedded space, a single core 7448 might not be tempting enough for an uppgrade, but how about a 7448D with the same power requirements as the old CPU?



    As for solving a lot of headaches for Apple, no I don't think so. But it might be a nice upgrade for the Mini, then having the following line up (assuming that the rumors that the 8641D is sampling way ahead of schedule are true):



    Mini - 7448D



    eMac - 8641D



    iMac - 970MP



    Power Mac - x2 970MP



    ================



    iBook - 7448D



    PowerBook - 8641D
  • Reply 3 of 54
    I would seriously question the potency of a dual core "e600" without either DDR support and/or a faster memory interface (essentially the same thing, practically). Obviously the most affected part of the chip will be the Altivec units, and quite frankly, at that point, why waste transistors on a second altivec unit?



    Other than that, I believe moving to the 7448 offers great advantage, and to be honest, I'd consider an Apple laptop with a dual core 7448 even if the battery lasted 45 minutes and the second altivec unit was bandwidth starved.



    I'm just curious how the integer and fpu performance would be effected by the slow bus. This is kindof a sketchy report at this point, being unsubstantiated by any other sources, but I hold out hope since Apple seems to have put a fair amount of effort into making Tiger more efficient in multiple CPU situations and I suspect they will try to captialise on that with marketing hardware/software together.
  • Reply 4 of 54
    henriokhenriok Posts: 537member
    Very unlikely.. How could these chips be dual core, and still be pin compatible if they don't use an on die memory controller? And since 7447 doesn't have one of those I can't belive that this rumor has any merit.
  • Reply 5 of 54
    eric_zeric_z Posts: 175member
    Quote:

    Originally posted by Henriok

    Very unlikely.. How could these chips be dual core, and still be pin compatible if they don't use an on die memory controller? And since 7447 doesn't have one of those I can't belive that this rumor has any merit.



    Just like the 8641, the hypothetical 7448D would use the MPX bus to connect the two cores. Think of it like a dual G4 expansion card but shrunk down to the size of a single chip.
  • Reply 6 of 54
    smirclesmircle Posts: 1,035member
    Quote:

    Originally posted by ChevalierMalFet

    This is kindof a sketchy report at this point, being unsubstantiated by any other sources



    Absolutely, and I won't be able to provide any further details, not least due to Apples legal stormtroopers forcing rumor sites to hand over logfiles and the like. I am by no means sure this has any meaning to future Apple hardware - after all, the guy might be talking out of his ass, the 7448D might be an abortive project for some technical reason, thermal characteristics might prove inadequate for a notebook computer, Apple might go with IBM, etc.



    I wouldn't have bothered posting but for my gut-feeling that Apple would love to take the wind out of intels dual-core plans by introducing the first dual notebook computer in early summer. And having a drop-in replacement for the current single-core chips (some minor modifications to the RAM controller and cooling might be necessary, but much less than for a 8641D or "Antares" 970gx) would surely make the decision easier. If the chip is what my mate claims, Apple could go with 7448 for the 12" powerbook (power/heat concerns) and 7448D for the 15 and 17" with one mainboard design.



    Anyhow, I sure hope someone with connections into Freescale and/or Apple takes the hint and pumps his sources for confirmation.
  • Reply 7 of 54
    stoostoo Posts: 1,490member
    I doubt that Apple would go for a drop in dual core CPU, because it wouldn't perform anywhere near expectations. When you mention "dual", people are looking for a 50%+ speed boost, which I doubt a 200MHz MPX FSB could provide.
  • Reply 8 of 54
    The Mac Mini represents one of the largest opportunities for Freescale to come their way. Considering that it may be becoming one of Apple's highest volume Mac computers, Freescale should be doing everything they can to enhance their processors for it.



    As far as the 200Mhz FSB, represents a 20% performance improvement with the added benefit of a larger L2 cache. In addition, it's only one step away from DDR which would put it at an effective 400Mhz FSB. Most processors are doing an actual 200MHz FSB and using DDR to get a effective 400Mhz FSB. So Freescale is not too far behind.
  • Reply 9 of 54
    thttht Posts: 3,252member
    Quote:

    Originally posted by stingerman

    The Mac Mini represents one of the largest opportunities for Freescale to come their way. Considering that it may be becoming one of Apple's highest volume Mac computers, Freescale should be doing everything they can to enhance their processors for it.



    I agree with you here. If Freescale can ramp a G4 processor in performance well, they would have a market in the Mac mini, iBooks and even Powerbooks. At least 2 of those are Apple's volume sellers.



    Quote:

    In addition, it's only one step away from DDR which would put it at an effective 400Mhz FSB. Most processors are doing an actual 200MHz FSB and using DDR to get a effective 400Mhz FSB. So Freescale is not too far behind.



    Actually, they are way behind, two generations behind. They had their chance to make the FSB DDR at 180 nm, but they didn't. They had a chance to do at 130 nm, but they didn't. Heck, they have a chance to do it at 90 nm, but they aren't. If the MPX bus was too hard to make DDR, they could have taken a step backward to the 60x bus and made that DDR or QDR, but didn't.



    I guess those embedded G4 customers really haven't needed the bandwidth the last 4 years, otherwise you'd think they could have forced Moto/Freescale to do something about it. My conspiracy theory for awhile was that they were doing it, holding back the G4 FSB, on purpose to protect RapidIO. It's just doesn't make a whole lot of sense otherwise.



    In the meanwhile, AMD is almost completely done transitioning their CPU products to the K8 architecture which has an on-chip memory controller, Intel is happily moving along with their quad-data rate FSB (up to 267 MHz real clock) for Netburst chips and on-chip memory controller for Centrino chips, and of course IBM has the high clock DDR elastic bus.



    I'm even disappointed in the 8641D with the on-chip 8641D. They have a 1.5+ GHz dual-core chip, yet only bridge them with an "up to 667" MHz on-chip MPX bus. That's an on-chip bus! The external FSB in the 2.5 GHz Power Mac G5 is almost that fast, one way.
  • Reply 10 of 54
    Quote:

    Originally posted by THT

    I'm even disappointed in the 8641D with the on-chip 8641D. They have a 1.5+ GHz dual-core chip, yet only bridge them with an "up to 667" MHz on-chip MPX bus. That's an on-chip bus! The external FSB in the 2.5 GHz Power Mac G5 is almost that fast, one way.



    The 8641D data sheet says that the external bus is 667, while internally the chip uses a bus 3-4X that. That means that theoretically, the CPU speed should be 2.6GHz.
  • Reply 11 of 54
    onlookeronlooker Posts: 5,252member
    I can't imagine this chip out performing anything the current powerbook has available to it. From all the previous posts it appears this chip specifically is a dead end, but that's not to say they could not make a better one in the future, but again they are pretty far behind.
  • Reply 12 of 54
    Quote:

    Originally posted by THT

    If the MPX bus was too hard to make DDR, they could have taken a step backward to the 60x bus and made that DDR or QDR, but didn't.



    I guess those embedded G4 customers really haven't needed the bandwidth the last 4 years, otherwise you'd think they could have forced Moto/Freescale to do something about it. My conspiracy theory for awhile was that they were doing it, holding back the G4 FSB, on purpose to protect RapidIO. It's just doesn't make a whole lot of sense otherwise.





    It's a money thing. As of yet, Motorola/Freescale had decided that it wasn't worth the investment to develop DDR into the FSB.



    Period.
  • Reply 13 of 54
    wizard69wizard69 Posts: 12,866member
    The data sheet I had specifically stated that the internal MPX bus was 667 MHz. You may be referring to the memory interface but that is not the same thing and I'm not sure where that maxs out on the 8641 series.



    The other external busess on the 8641 are either PCI-Express or Rapid I/O with a secondary bus we have little information on. I beleive that secondary bus is there to support multiprocessing.



    In any event I have to say my hopes are high also for core frequencies. When Freescales state above 2GHz I'm thinking they are going well above that so your 2.6GHz is probally accurate. I think such a chip could result in a very interesting machine especially if they can tweak float performance at all. They would also have to keep the power down.



    I would not be surprised to find that Power is why they are a lttile long in getting to 90nm. Freescale is most likely taking their time to fully exploit the potential of 90nm.



    Dave



    Quote:

    Originally posted by smallstepforman

    The 8641D data sheet says that the external bus is 667, while internally the chip uses a bus 3-4X that. That means that theoretically, the CPU speed should be 2.6GHz.



  • Reply 14 of 54
    wizard69wizard69 Posts: 12,866member
    Quote:

    Originally posted by stingerman

    The Mac Mini represents one of the largest opportunities for Freescale to come their way. Considering that it may be becoming one of Apple's highest volume Mac computers, Freescale should be doing everything they can to enhance their processors for it.



    IF some of the speculated sales rates are true the Mini could be more significant to Freescale than it is to Apple. The Mini could very well help Freescale establish itself and break free of the Motorola stigma.



    I agree that Freescale needs to offer enhanced processors for the Mini. Apparently they already have processors in the pipe that come close, but knowing Freescales markets I would think that some place hidden from public view is an e600 variant event better suited to Apple's Mini. I fully expect at least one more revision in the current form though.

    Quote:

    As far as the 200Mhz FSB, represents a 20% performance improvement with the added benefit of a larger L2 cache. In addition, it's only one step away from DDR which would put it at an effective 400Mhz FSB. Most processors are doing an actual 200MHz FSB and using DDR to get a effective 400Mhz FSB. So Freescale is not too far behind.



    I don't think we will see DDR FSB for this series at all. At this point it would make more sense for Freescale to make use of the IMC technology they already have.



    I think what people might be missing here though is that this speculted chip would be ideal for milking a few more years out of the eBook line. Yep that is right, I don't think this is a PowerBook chip at All. Rather I see it as a cheap and easy way to improve the very bottom of the hardware line. The FSB would be limiting on anything more involved than a Mini of an eBook, but would work nicely to extend old hardware.



    Dave
  • Reply 15 of 54
    thttht Posts: 3,252member
    Quote:

    Originally posted by smallstepforman

    The 8641D data sheet says that the external bus is 667, while internally the chip uses a bus 3-4X that. That means that theoretically, the CPU speed should be 2.6GHz.



    It's unfortunate, unfortunate for us all, that you are wrong. The 8641D has an internal MPX bus, the whole hog MPX bus, protocols and all unchanged on the chip and they state that this bus operates up to 667 MHz. The e600 core would then be operating at integer multiples of 667 MHz. Bandwidth going to the e600 cores will be 5.3 GByte/s, to be shared by both cores.



    When they mention the 3 to 4 times faster, it is in reference to an external MPX bus. I quote the fact sheet, "One of the significant advantages of the MPC8641D is the fully integrated MPX bus that can run three to four times faster than an external MPX bus.". The fastest external MPX bus to date is 167 MHz, and guess what, 4 times 167 is 667 MHz, the quoted integrated or internal MPX bus clock.



    And judging by other 90 nm fabs, if Freescale can hit 2 GHz with the 7448 or e600 chips, they will be doing extremely well. There's virtually zero chance of it hitting 2.6 GHz in shippable quantities. They may even be lucky to get 2 GHz when the fab is mature.
  • Reply 16 of 54
    Would the MPC8641D be pin compatible with the current logic boards and?
  • Reply 17 of 54
    I believe both the 8641 and 8641D chips use the same, unique pin config. I remember certainly, at the least, that the 8641D is not pin compatible to the 7xxx series.
  • Reply 18 of 54
    Quote:

    Originally posted by Smircle

    Friend of mine works in a Freescale lab developing reference designs for customers of the PPC. He told me they have received a bunch of dual-core PPCs pin-compatible with the 7447. This cannot be prototypes of the MPC8461D, because those are more like SOCs.



    I was just thinking...this maybe more plausible than I originally gave you credit for. Are you sure this 7448D was a drop in for the 7447? Even at 90nm, two 7448s plus 2 megs of L2 cache (as per the original 7448 specs) are not going to fit in the same spacce.



    Having said that, two 7448s with 1 meg of L2 cache @ 90nm might fit into the same space as a 7457...basically a 7447 with higher voltage and larger packaging.



    Can anybody be bothered doing the sums? I reckon this potentially just might be a potential possibility.
  • Reply 19 of 54
    eric_zeric_z Posts: 175member
    Quote:

    Originally posted by wizard69

    The other external busess on the 8641 are either PCI-Express or Rapid I/O with a secondary bus we have little information on. I beleive that secondary bus is there to support multiprocessing.



    Pardon me? Would you mind clarifying what bus you think we have little information about, the RIO bus?



    Or did you mean the 32bit 166Mhz "local bus"?
  • Reply 20 of 54
    amorphamorph Posts: 7,112member
    Remember, the 7448D would essentially be a different packaging of the same architecture used in the dual G4 PowerMacs. There's nothing new or interesting about hanging two G4 cores off the same bus. This packaging would simply reduce the cost of implementing a dual G4.



    In the latter days of the PowerMac G4, duallies were about 40% faster on average than singles. If this chip is replacing single G4s, I don't see anyone complaining about a 40% average jump at the same clock speed (and much higher gains in specific circumstances), and the more "smooth" feeling of multitasking under SMP.



    If they simultaneously bump MaxBus up to 200MHz, even better. At the very least, it can tide Apple over until IBM and Freescale roll out the low-power designs they're currently working on.
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