. . . During one part of the CPU fabrication cycle, called Burn-In, the currents drawn by a single CPU chip can reach up to 300 Amps and 400 Watts
Seriously. This is due to the dramatically increased leakage currents (as someone else mentioned earlier), and elevated core voltages.
If anyone wants to know more about Burn-In, let me know.
If you have the information handy, I would be curious to know at what stage they do the burn in - - likely after it is packaged and bonded, but before they close the lid?
Also, I wonder how long the burn in lasts -- likely two seconds or less?
All of the IBM literature I've read has talked about a debut at 130nm, with a move to 90nm "shortly". 90nm and smaller lithography is what Fishkill is really set up for, and IBM has consistently voiced an intention to move to 90nm as quickly as they can. Fishkill cost a mint, and it's gotta pay for itself.
The die-shrunk 970 should arrive some time before we see the 980, and it'll be a great PowerBook/iMac CPU. . .
I sure would like to see a write up on the PPC development in a year or two. It would be so nice to know the facts, once the 970 and 980 have been out for a while. The whole story, about the problems with Motorola and how IBM got into doing the 970, would make fascinating reading.
If you have the information handy, I would be curious to know at what stage they do the burn in - - likely after it is packaged and bonded, but before they close the lid?
Well, sometimes BI is done after packaging, and yes, before the lid is on. The die surface must be directly contactable for heat injection and/or removal. However, it is also sometimes done before final test and packaging. This is how the POWER4 is done. It is mounted on a 'temorary chip attach' in single dice. Then, later, after final test, four die are packaged into one (huge) MCM (multi-chip-module).
I would think that most non-MCM CPUs would be burned-in after final packaging (sans lid).
Quote:
Also, I wonder how long the burn in lasts -- likely two seconds or less? [/B]
Um, try 24 - 48 hours
But the spurts of 300 Amps are for much shorter durations, but many, many times over those hours.
But the spurts of 300 Amps are for much shorter durations, but many, many times over those hours.
Thank you for the interesting information. Yes, the spurts can't be too long or the tiny bonding wires will melt like fuse links, probably just before the chip turns to jelly.
Thank you for the interesting information. Yes, the spurts can't be too long or the tiny bonding wires will melt like fuse links, probably just before the chip turns to jelly.
Well, there really arn't any bond wires on these chips these days. Every CPU I've seen in recent history has been flip-chip or something similar. There are no bond wires there. The die is just flipped over, and glued to the carrier, with soldier columns that contact the die pads. This is a damn cool way of mounting chips for two reasons:
The back side of the die is still exposed. This allows a heatsink to directly contact the silicon, without any packaging resistance in between. This means that there never is any 'lid' put on flip-chip packages.
The die pads don't have to be on the perimeter of the die. This allows more pads for a given chip size, and the routing on the die is easier because signals don't have to find their way to the edges.
Oh, and I would think that not having the super thin bond wires in there would increase reliability too.
And the BI ovens are designed to take all that heat away, like really fast. Other wise the chip would be jelly.
Well, there really arn't any bond wires on these chips these days. . .
Other advantages are lower impedance, lower inductance connections for high speed signals, and higher current carrying capability. I was thinking there would need to be a lot of bonding wires to carry about 32 Amperes in a 1.8 GHz CPU. This technique makes a huge difference.
Thank you for bringing me up to date, up to the twenty first century.
I am sure that the behind the scene drama and plots between the AIM group is something to behold. The relation between Apple and Motorola must have been a tad strained at times...
I would also like to know about the history to give up on the 68k CPUs and migrate to the PPC. After about 10 years of 68k this can not have been taken on a whim.
The 68040 lagging behind the competing 486 that broke the 100 MHz barrier while the 68040 was at less than half the clock speed. The painful relisation that the 68050 and 68060 was getting nowere (well the 66 MHz 68060 showed up in Amiga and had 3 times the CPU performance of a 25 MHz 68040)
One CPU lagging behind and the next generation not showing up, it does sound familiar...
Any truth to my instincts that the programmable GPU (obviously copuled with a faster CPU/Motherboard in general) is going to help Apple's image as a gaming platform?
I really like «copuled». Easy to understand (and imagine) computer hardware/software interaction.
The 68040 lagging behind the competing 486 that broke the 100 MHz barrier while the 68040 was at less than half the clock speed. The painful relisation that the 68050 and 68060 was getting nowere (well the 66 MHz 68060 showed up in Amiga and had 3 times the CPU performance of a 25 MHz 68040)
One CPU lagging behind and the next generation not showing up, it does sound familiar...
I was thinking of the same thing just a few days ago. I remember when Apple changed the PowerBook 190 to a 66 mhz rating instead of the 33 mhz 68040 that it came with stating that internally, the processor ran at that speed. Fortunately, at that time, we had the PowerPC to look forward to...
now it's the PPC 970 and 980... the more things change, the more they stay the same.
now it's the PPC 970 and 980... the more things change, the more they stay the same.
na
Sorry, but your analogy does not apply. You are comparing Apples, Oranges and Bananas. Oh by the way, the Powerbook 190 did run at 66mhz internally, but still had a 33mhz FSB. Not so different then then a 1.42ghz CPU with a 166mhz FSB . It is one of those common marketing disceptions allowed by law. The 970 is what Apple and Steve Jobs expected Motorola to provide some years ago. Unfortunately, Motorola did not deliver, but IBM will. Rembember that the Power PC began with IBM. (oh wait, maybe some don't remember, but it did).
Sorry, but your analogy does not apply. You are comparing Apples, Oranges and Bananas. Oh by the way, the Powerbook 190 did run at 66mhz internally, but still had a 33mhz FSB. Not so different then then a 1.42ghz CPU with a 166mhz FSB . It is one of those common marketing disceptions allowed by law. The 970 is what Apple and Steve Jobs expected Motorola to provide some years ago. Unfortunately, Motorola did not deliver, but IBM will. Rembember that the Power PC began with IBM. (oh wait, maybe some don't remember, but it did).
Both snoopy and Bigc are correct. The total available power required by a CPU can be measured by P=I*V and is what the DC power supply in your computer case has to provide. Bigc is partially correct because the total power consumption required by a CMOS device such as CPU is a function of several different power draws. One of which is the dynamic power dissipation and is indeed a measure of frequency, activity, and is a function of the square of voltage. However there is also static power consumption due to leakage which is becoming a much larger percentage of overall power dissipation. Nearly 100% of power in a CPU is dissipated as heat and therefore the heat transfer of an attached heatsink is critical.
apple taking out 970 specific code in panther betas to keep 970 a secret
970 out in july?
970 speeds 1.7 and 2.5
maybe someone can translate...
What betas? If Apple will release 970 in two months, the developers who have access to Panther builds should know about the 970 by now - Apple would be stupid to release the 970 without at least some 64bit enabled apps.
To finish some with information below, we received information from a source to the top of any suspicion.
It is Darwin 7 who will be included in Panther 1.0.
Power4+ with 1,7 Ghz for July - Yoc - 11:06:52
I leave the word to Donatello which proposes his analysis of the situation concerning the sources of Darwin and on the influence of materials used in the manufacture of Power4 and PPC 970 to us.
In connection with Darwin, it is interesting to note that the sources are not updated any more since February. Now APPLE diffuses only the sources corresponding to the official versions of MacOSX. For example, Darwin 6.6 for OS X 10.2.6.
Previously, APPLE diffused also the sources of the versions under development on their waiters CVS. Ainsi last May, one had already access to the sources of the future Jaguar. APPLE took however time to remove the parts of the code written to support products not left.
I imagine that if they added the support of PowerPC 970 in Darwin. It is not a small cleaning which it is necessary to subject the code to hide these modifications.
One can then imagine that with the support of PowerPC 970, it had become impossible to hide these modifications. And it east can be why APPLE is limited since February to diffuse the sources of the official versions.
The tools for developers underwent the same treatment. One has the impression that APPLE stopped working above since December.
With my opinion, the exit of Macintosh containing PowerPC 970 is certain. But APPLE wants to preserve the effect of advertisement.
Another thing, I had confirmation that it was the material with low K, leSiLK, which was at the base of new Power4+ with 1,7 GHz. They must leave in July. With same material, PowerPC 970 should turn to 2,3 GHz and more.
Approximately, PowerPC 970 it is finer engraved Power4+. There is not same the exigeances reliability for this type of processor. But more one processor is engraved fine more it is fast. The problem it is that one reaches others then limit physical. And it is then necessary to facilitate the passage of the electrons by using materials with low K For IBM, it is SiLK for engraving in 0,13 um. And still new material for engraving in 0,09 um.
As PowerPC 970 is engraved finer than Power4+, it will profit more this new material. And it should reach in an immediate future 2,5 GHz as IBM announced one moment. At the end of 2003, at the beginning of 2004, it should profit from engraving with 0,09 um. And at the end of 2004, IBM will add the "strained silicon to it". The goal is always to accelerate the mobility of the electrons. Power5+ will reach 3 then GHz. And PowerPC 970/980 can be 4,5 GHz. If the reports/ratios are maintienent.
Both snoopy and Bigc are correct. The total available power required by a CPU can be measured by P=I*V and is what the DC power supply in your computer case has to provide. Bigc is partially correct because the total power consumption required by a CMOS device such as CPU is a function of several different power draws. One of which is the dynamic power dissipation and is indeed a measure of frequency, activity, and is a function of the square of voltage. However there is also static power consumption due to leakage which is becoming a much larger percentage of overall power dissipation. . .
Yes, I pointed out in my first reply to Bigc on page 9 that his dynamic formula looked correct. My main complaint was that this formula is almost useless for determining the actual power dissipation of a CPU. It requires knowledge of the exact capacitance and duty cycle of each and every switch in the CPU. An impossible task, and as you point out, it still does not take into account the static leakage current. The P = I * V formula uses just the voltage and current, which are easily measured.
I don't want to give someone reading this the impression that the formula presented by Bigc is completely useless. It can be used to understand how switching power varies for changes in operating conditions. For example, it shows that doubling clock rate will double the switching power. Doubling the supply voltage will increase switching power by four.
I am sure that the behind the scene drama and plots between the AIM group is something to behold. The relation between Apple and Motorola must have been a tad strained at times...
You mean like when Jobs told the MOT reps to "Get the **** out of my office"?
Comments
Nothing really new in the particulars, but confirming them.
What exactly are they confirming?
Originally posted by Transcendental Octothorpe
. . . During one part of the CPU fabrication cycle, called Burn-In, the currents drawn by a single CPU chip can reach up to 300 Amps and 400 Watts
Seriously. This is due to the dramatically increased leakage currents (as someone else mentioned earlier), and elevated core voltages.
If anyone wants to know more about Burn-In, let me know.
If you have the information handy, I would be curious to know at what stage they do the burn in - - likely after it is packaged and bonded, but before they close the lid?
Also, I wonder how long the burn in lasts -- likely two seconds or less?
Originally posted by Amorph
All of the IBM literature I've read has talked about a debut at 130nm, with a move to 90nm "shortly". 90nm and smaller lithography is what Fishkill is really set up for, and IBM has consistently voiced an intention to move to 90nm as quickly as they can. Fishkill cost a mint, and it's gotta pay for itself.
The die-shrunk 970 should arrive some time before we see the 980, and it'll be a great PowerBook/iMac CPU. . .
I sure would like to see a write up on the PPC development in a year or two. It would be so nice to know the facts, once the 970 and 980 have been out for a while. The whole story, about the problems with Motorola and how IBM got into doing the 970, would make fascinating reading.
Originally posted by snoopy
If you have the information handy, I would be curious to know at what stage they do the burn in - - likely after it is packaged and bonded, but before they close the lid?
Well, sometimes BI is done after packaging, and yes, before the lid is on. The die surface must be directly contactable for heat injection and/or removal. However, it is also sometimes done before final test and packaging. This is how the POWER4 is done. It is mounted on a 'temorary chip attach' in single dice. Then, later, after final test, four die are packaged into one (huge) MCM (multi-chip-module).
I would think that most non-MCM CPUs would be burned-in after final packaging (sans lid).
Also, I wonder how long the burn in lasts -- likely two seconds or less? [/B]
Um, try 24 - 48 hours
But the spurts of 300 Amps are for much shorter durations, but many, many times over those hours.
Originally posted by Transcendental Octothorpe
. . . Um, try 24 - 48 hours
But the spurts of 300 Amps are for much shorter durations, but many, many times over those hours.
Thank you for the interesting information. Yes, the spurts can't be too long or the tiny bonding wires will melt like fuse links, probably just before the chip turns to jelly.
Originally posted by snoopy
Thank you for the interesting information. Yes, the spurts can't be too long or the tiny bonding wires will melt like fuse links, probably just before the chip turns to jelly.
Well, there really arn't any bond wires on these chips these days. Every CPU I've seen in recent history has been flip-chip or something similar. There are no bond wires there. The die is just flipped over, and glued to the carrier, with soldier columns that contact the die pads. This is a damn cool way of mounting chips for two reasons:
The back side of the die is still exposed. This allows a heatsink to directly contact the silicon, without any packaging resistance in between. This means that there never is any 'lid' put on flip-chip packages.
The die pads don't have to be on the perimeter of the die. This allows more pads for a given chip size, and the routing on the die is easier because signals don't have to find their way to the edges.
Oh, and I would think that not having the super thin bond wires in there would increase reliability too.
And the BI ovens are designed to take all that heat away, like really fast. Other wise the chip would be jelly.
Originally posted by Transcendental Octothorpe
Well, there really arn't any bond wires on these chips these days. . .
Other advantages are lower impedance, lower inductance connections for high speed signals, and higher current carrying capability. I was thinking there would need to be a lot of bonding wires to carry about 32 Amperes in a 1.8 GHz CPU. This technique makes a huge difference.
Thank you for bringing me up to date, up to the twenty first century.
I would also like to know about the history to give up on the 68k CPUs and migrate to the PPC. After about 10 years of 68k this can not have been taken on a whim.
The 68040 lagging behind the competing 486 that broke the 100 MHz barrier while the 68040 was at less than half the clock speed. The painful relisation that the 68050 and 68060 was getting nowere
One CPU lagging behind and the next generation not showing up, it does sound familiar...
Originally posted by bunge
Any truth to my instincts that the programmable GPU (obviously copuled with a faster CPU/Motherboard in general) is going to help Apple's image as a gaming platform?
I really like «copuled». Easy to understand (and imagine) computer hardware/software interaction.
Originally posted by DrBoar
The 68040 lagging behind the competing 486 that broke the 100 MHz barrier while the 68040 was at less than half the clock speed. The painful relisation that the 68050 and 68060 was getting nowere
One CPU lagging behind and the next generation not showing up, it does sound familiar...
I was thinking of the same thing just a few days ago. I remember when Apple changed the PowerBook 190 to a 66 mhz rating instead of the 33 mhz 68040 that it came with stating that internally, the processor ran at that speed. Fortunately, at that time, we had the PowerPC to look forward to...
now it's the PPC 970 and 980... the more things change, the more they stay the same.
na
Originally posted by nagha
I
now it's the PPC 970 and 980... the more things change, the more they stay the same.
na
Sorry, but your analogy does not apply. You are comparing Apples, Oranges and Bananas. Oh by the way, the Powerbook 190 did run at 66mhz internally, but still had a 33mhz FSB. Not so different then then a 1.42ghz CPU with a 166mhz FSB . It is one of those common marketing disceptions allowed by law. The 970 is what Apple and Steve Jobs expected Motorola to provide some years ago. Unfortunately, Motorola did not deliver, but IBM will. Rembember that the Power PC began with IBM. (oh wait, maybe some don't remember, but it did).
Originally posted by Shaktai
Sorry, but your analogy does not apply. You are comparing Apples, Oranges and Bananas. Oh by the way, the Powerbook 190 did run at 66mhz internally, but still had a 33mhz FSB. Not so different then then a 1.42ghz CPU with a 166mhz FSB . It is one of those common marketing disceptions allowed by law. The 970 is what Apple and Steve Jobs expected Motorola to provide some years ago. Unfortunately, Motorola did not deliver, but IBM will. Rembember that the Power PC began with IBM. (oh wait, maybe some don't remember, but it did).
CHRP
apple taking out 970 specific code in panther betas to keep 970 a secret
970 out in july?
970 speeds 1.7 and 2.5
maybe someone can translate...
Both snoopy and Bigc are correct. The total available power required by a CPU can be measured by P=I*V and is what the DC power supply in your computer case has to provide. Bigc is partially correct because the total power consumption required by a CMOS device such as CPU is a function of several different power draws. One of which is the dynamic power dissipation and is indeed a measure of frequency, activity, and is a function of the square of voltage. However there is also static power consumption due to leakage which is becoming a much larger percentage of overall power dissipation. Nearly 100% of power in a CPU is dissipated as heat and therefore the heat transfer of an attached heatsink is critical.
Originally posted by keyboardf12
MacBoupyBippy just posted a new story:
apple taking out 970 specific code in panther betas to keep 970 a secret
970 out in july?
970 speeds 1.7 and 2.5
maybe someone can translate...
What betas? If Apple will release 970 in two months, the developers who have access to Panther builds should know about the 970 by now - Apple would be stupid to release the 970 without at least some 64bit enabled apps.
From Macdiboo:
[ Rumour ] Darwin 7 - Lionel - 17:20:46
To finish some with information below, we received information from a source to the top of any suspicion.
It is Darwin 7 who will be included in Panther 1.0.
Power4+ with 1,7 Ghz for July - Yoc - 11:06:52
I leave the word to Donatello which proposes his analysis of the situation concerning the sources of Darwin and on the influence of materials used in the manufacture of Power4 and PPC 970 to us.
In connection with Darwin, it is interesting to note that the sources are not updated any more since February. Now APPLE diffuses only the sources corresponding to the official versions of MacOSX. For example, Darwin 6.6 for OS X 10.2.6.
Previously, APPLE diffused also the sources of the versions under development on their waiters CVS. Ainsi last May, one had already access to the sources of the future Jaguar. APPLE took however time to remove the parts of the code written to support products not left.
I imagine that if they added the support of PowerPC 970 in Darwin. It is not a small cleaning which it is necessary to subject the code to hide these modifications.
One can then imagine that with the support of PowerPC 970, it had become impossible to hide these modifications. And it east can be why APPLE is limited since February to diffuse the sources of the official versions.
The tools for developers underwent the same treatment. One has the impression that APPLE stopped working above since December.
With my opinion, the exit of Macintosh containing PowerPC 970 is certain. But APPLE wants to preserve the effect of advertisement.
Another thing, I had confirmation that it was the material with low K, leSiLK, which was at the base of new Power4+ with 1,7 GHz. They must leave in July. With same material, PowerPC 970 should turn to 2,3 GHz and more.
Approximately, PowerPC 970 it is finer engraved Power4+. There is not same the exigeances reliability for this type of processor. But more one processor is engraved fine more it is fast. The problem it is that one reaches others then limit physical. And it is then necessary to facilitate the passage of the electrons by using materials with low K For IBM, it is SiLK for engraving in 0,13 um. And still new material for engraving in 0,09 um.
As PowerPC 970 is engraved finer than Power4+, it will profit more this new material. And it should reach in an immediate future 2,5 GHz as IBM announced one moment. At the end of 2003, at the beginning of 2004, it should profit from engraving with 0,09 um. And at the end of 2004, IBM will add the "strained silicon to it". The goal is always to accelerate the mobility of the electrons. Power5+ will reach 3 then GHz. And PowerPC 970/980 can be 4,5 GHz. If the reports/ratios are maintienent.
Here it is all that I know.
Originally posted by Eskimo
Re: Power
Both snoopy and Bigc are correct. The total available power required by a CPU can be measured by P=I*V and is what the DC power supply in your computer case has to provide. Bigc is partially correct because the total power consumption required by a CMOS device such as CPU is a function of several different power draws. One of which is the dynamic power dissipation and is indeed a measure of frequency, activity, and is a function of the square of voltage. However there is also static power consumption due to leakage which is becoming a much larger percentage of overall power dissipation. . .
Yes, I pointed out in my first reply to Bigc on page 9 that his dynamic formula looked correct. My main complaint was that this formula is almost useless for determining the actual power dissipation of a CPU. It requires knowledge of the exact capacitance and duty cycle of each and every switch in the CPU. An impossible task, and as you point out, it still does not take into account the static leakage current. The P = I * V formula uses just the voltage and current, which are easily measured.
I don't want to give someone reading this the impression that the formula presented by Bigc is completely useless. It can be used to understand how switching power varies for changes in operating conditions. For example, it shows that doubling clock rate will double the switching power. Doubling the supply voltage will increase switching power by four.
Originally posted by DrBoar
I am sure that the behind the scene drama and plots between the AIM group is something to behold. The relation between Apple and Motorola must have been a tad strained at times...
You mean like when Jobs told the MOT reps to "Get the **** out of my office"?
Originally posted by moki
You mean like when Jobs told the MOT reps to "Get the **** out of my office"?
I think Steve tells that to everyone that goes in his office...