<strong>Does anyone know off the top of their head what wattages the current notebook processors pull? I'd look it up, but I'm lazy and on my way to class.</strong><hr></blockquote>
According to IBM's spec sheet the G3 750FX uses 3.6 watts @800MHz. That's why the iBooks have great battery life.
redkid is the source that told you fall reliable. Would you bet good money on it? I'm just trying to get a feel as to how sure you are about this fall thing. And since the 970 at 1.2ghz is rather cool running chip would we not see 970 Powerbooks at or around the same time. I don't believe we are going to have a 2 year wait to get a 970 powerbook like we did the G4 powerbook.
I don't know... the IBM presentation was pretty clear that the bus speed is half the processor speed. Period. The other documents I've seen do nothing to dissuade me from this notion. Its also a significantly different bus design than MPX, and the emphasis is clearly on high bandwidth. Since there is no L3 cache support my suspicion is that they aren't interested in being able to cripple the processor's FSB.
Its worth pointing out that the FSB is just a connection from processor(s) to the companion chip, and this will likely be a tightly controlled link of minimal length. Combined with its high clock rate this would tend to make me think that the companion chip will sit on a high quality daughtercard with the processor(s). It remains to be seen where the memory sits, and how the connection to the southbridge on the motherboard is done. In this kind of a setup Apple might be able to support very high clock rates on the FSB (i.e. >1 GHz).</strong><hr></blockquote>
The front side bus works at integer dividers of the clock frequency, and is double pumped, the 1.8GHz has a 4:1 divider, giving 900MHz effective data rate.
The bus is also wave-pipelined, which means that more than one bit of data can be on the line at once, so that line delays can be more than one cycle long. The bus is also unidirectional, which means you can put the next request on the bus without having to wait for the bus to turn around and send the requested data back. The bus is actually well suited to long distances between the CPU and the companion chip. That being said, laying out the board would be easier, and latencies would be reduced, if the two were close.
Err, yeah I was ignoring the double-pumped nature of the FSB just for simplicity and calling it 900 MHz as seems to be standard practice these days. So yes, the clock rate multiplier is actually 4:1.
I'd been refering to a 3rd party article about the 970 so I went back to the MDF presentation and checked... it doesn't talk about mulitpliers but it does say "Up to 900MHz bitrate". Hmmm, I guess it does support slower buses. I really hope this is not an option Apple chooses to use.
My supposition about a small daughtercard arrangement is just speculation based on the idea that PCBs for 900 MHz buses are expensive, and this is the portion that will differ between single, dual, and quad processor machines. If all that will live on these cards is the processor(s) and companion chip, then they can be very small to minimize cost and latency. The connection to the main motherboard will be interesting as it will probably have to carry both the southbridge connection and the memory bus... unless the memory lives on the daughtercard.
I can't wait to see these new machines, it'll be the first time in a while that Apple really has had a chance to innovate on the motherboard. Hopefully they do it well.
<strong> it doesn't talk about mulitpliers but it does say "Up to 900MHz bitrate". Hmmm, I guess it does support slower buses. I really hope this is not an option Apple chooses to use.</strong><hr></blockquote>They're probably just referring to the slower FSB speeds for the slower processors (<1.8Ghz).
<strong>They're probably just referring to the slower FSB speeds for the slower processors (<1.8Ghz).</strong><hr></blockquote>
That had been my original thought, but the implication from the people quoting Mr Wang's article is otherwise. Unfortunately I can't get to that article at the moment for some reason.
I was curious if they could implement a 5:1 ratio. This would allow a 2.25GHz Machine to still retain it's 900MHz bus while being more flexible with configurations. While 1GHz buses are not out of the question, it may have obstacles we are not away of.
<strong>....If all that will live on these cards is the processor(s) and companion chip, then they can be very small to minimize cost and latency.....</strong><hr></blockquote>
After reading the Ars Technica article and some of the information available on the web, I'm still confused over what exactly the "companion chip" does. I would have thought it was some kind of controller chip?? Or is it just some kind of interface to be connected to the controller chips, if so what other possible uses beyond just communication could/would be included on the companion chip(re: odd name)
<strong>After reading the Ars Technica article and some of the information available on the web, I'm still confused over what exactly the "companion chip" does. I would have thought it was some kind of controller chip?? Or is it just some kind of interface to be connected to the controller chips, if so what other possible uses beyond just communication could/would be included on the companion chip(re: some odd name)</strong><hr></blockquote>
The companion chip is just the thing on the opposite end of the FSB. Given Apple's typical tightly integrated designs I would guess that we'll see their companion chip having 2-4 FSB ports, a memory controller, and some kind of a connection to the southbridge on the motherboard. This means "companion chip == northbridge".
<strong>redkid is the source that told you fall reliable. Would you bet good money on it? I'm just trying to get a feel as to how sure you are about this fall thing. And since the 970 at 1.2ghz is rather cool running chip would we not see 970 Powerbooks at or around the same time. I don't believe we are going to have a 2 year wait to get a 970 powerbook like we did the G4 powerbook.</strong><hr></blockquote>
Hard to say exactly. I feel good about it. I was told about an IBM chip replacing moto released in the fall of 2003 last year before IBM announced anything. So the source was right about a lot of things and when the press release said 2H of 2003 and other sources have said the fall, I just feel strongly about it based on circumstances not more evidence.
Thanks, I just started wondering because I had never heard the name companion chip before, causing wild unfounded speculation racing through my head concerning other possible functions that may be rolled into the companion chip.
<strong>Slow-tech folks, like myself, might find <a href="http://www.cpuplanet.com/features/article.php/1490831"; target="_blank">this article</a> about basic motherboard layout informative.</strong><hr></blockquote>
Okey Dokey. I thought I had a rudimentary understanding of the cpu - northbridge - southbridge layout, but what the heck. I read the article you linked to, twice, very nice article. Thank you.
But regretably no mention of Uninorth nor U2(re: nice band, used to listen to them in the 80's) I believe Apple computers use a bridge chip called Uninorth, right. But what's U2?? A chip for USB 2.0???
[quote]Originally posted by Transcendental Octothorpe:
<strong>
Then Uninorth, then U2, and then with the 970...
Oh, and other than a few supprises, Programmer has the content of the chip pretty close.</strong><hr></blockquote>
It'll also have a DMA engine and perhaps the DSP-like features that were talked about last year. We can hope for a direct AGP 8x port as well. Is this what you are refering to TO?
It'll also have a DMA engine and perhaps the DSP-like features that were talked about last year. We can hope for a direct AGP 8x port as well. Is this what you are refering to TO?[/QB][/QUOTE]
___________________________________________
Did you know that the AGP 8X spec provides for a *second* AGP 8X slot? Interesting possibilities.
Forgive me if this has been asked and answered, but what is the shortest time between upgrades that Apple has ever done?
Apple just updated the powermacs, but I can't imagine that they wouldn't use the 970 as soon as it was available. At least by putting it in the high end only.
<strong>Forgive me if this has been asked and answered, but what is the shortest time between upgrades that Apple has ever done?
Apple just updated the powermacs, but I can't imagine that they wouldn't use the 970 as soon as it was available. At least by putting it in the high end only.</strong><hr></blockquote>
Comments
<strong>Does anyone know off the top of their head what wattages the current notebook processors pull? I'd look it up, but I'm lazy
According to IBM's spec sheet the G3 750FX uses 3.6 watts @800MHz. That's why the iBooks have great battery life.
<strong>
According to IBM's spec sheet the G3 750FX uses 3.6 watts @800MHz. That's why the iBooks have great battery life.</strong><hr></blockquote>
methinks Motorola should contract w/ IBM to produce the MPC7455 on their 0.13µm process...end of rant
edit oops, there is no MPC7555, <img src="graemlins/lol.gif" border="0" alt="[Laughing]" />
[ 02-05-2003: Message edited by: rickag ]</p>
<strong>
I don't know... the IBM presentation was pretty clear that the bus speed is half the processor speed. Period. The other documents I've seen do nothing to dissuade me from this notion. Its also a significantly different bus design than MPX, and the emphasis is clearly on high bandwidth. Since there is no L3 cache support my suspicion is that they aren't interested in being able to cripple the processor's FSB.
Its worth pointing out that the FSB is just a connection from processor(s) to the companion chip, and this will likely be a tightly controlled link of minimal length. Combined with its high clock rate this would tend to make me think that the companion chip will sit on a high quality daughtercard with the processor(s). It remains to be seen where the memory sits, and how the connection to the southbridge on the motherboard is done. In this kind of a setup Apple might be able to support very high clock rates on the FSB (i.e. >1 GHz).</strong><hr></blockquote>
The front side bus works at integer dividers of the clock frequency, and is double pumped, the 1.8GHz has a 4:1 divider, giving 900MHz effective data rate.
see <a href="http://www.realworldtech.com/page.cfm?AID=RWT101502203725&p=2"; target="_blank">David Wang's article</a>
The bus is also wave-pipelined, which means that more than one bit of data can be on the line at once, so that line delays can be more than one cycle long. The bus is also unidirectional, which means you can put the next request on the bus without having to wait for the bus to turn around and send the requested data back. The bus is actually well suited to long distances between the CPU and the companion chip. That being said, laying out the board would be easier, and latencies would be reduced, if the two were close.
michael
I'd been refering to a 3rd party article about the 970 so I went back to the MDF presentation and checked... it doesn't talk about mulitpliers but it does say "Up to 900MHz bitrate". Hmmm, I guess it does support slower buses. I really hope this is not an option Apple chooses to use.
My supposition about a small daughtercard arrangement is just speculation based on the idea that PCBs for 900 MHz buses are expensive, and this is the portion that will differ between single, dual, and quad processor machines. If all that will live on these cards is the processor(s) and companion chip, then they can be very small to minimize cost and latency. The connection to the main motherboard will be interesting as it will probably have to carry both the southbridge connection and the memory bus... unless the memory lives on the daughtercard.
I can't wait to see these new machines, it'll be the first time in a while that Apple really has had a chance to innovate on the motherboard. Hopefully they do it well.
<strong> it doesn't talk about mulitpliers but it does say "Up to 900MHz bitrate". Hmmm, I guess it does support slower buses. I really hope this is not an option Apple chooses to use.</strong><hr></blockquote>They're probably just referring to the slower FSB speeds for the slower processors (<1.8Ghz).
<strong>They're probably just referring to the slower FSB speeds for the slower processors (<1.8Ghz).</strong><hr></blockquote>
That had been my original thought, but the implication from the people quoting Mr Wang's article is otherwise. Unfortunately I can't get to that article at the moment for some reason.
<strong>....If all that will live on these cards is the processor(s) and companion chip, then they can be very small to minimize cost and latency.....</strong><hr></blockquote>
After reading the Ars Technica article and some of the information available on the web, I'm still confused over what exactly the "companion chip" does. I would have thought it was some kind of controller chip?? Or is it just some kind of interface to be connected to the controller chips, if so what other possible uses beyond just communication could/would be included on the companion chip(re: odd name)
[ 02-04-2003: Message edited by: rickag ]</p>
<strong>After reading the Ars Technica article and some of the information available on the web, I'm still confused over what exactly the "companion chip" does. I would have thought it was some kind of controller chip?? Or is it just some kind of interface to be connected to the controller chips, if so what other possible uses beyond just communication could/would be included on the companion chip(re: some odd name)</strong><hr></blockquote>
The companion chip is just the thing on the opposite end of the FSB. Given Apple's typical tightly integrated designs I would guess that we'll see their companion chip having 2-4 FSB ports, a memory controller, and some kind of a connection to the southbridge on the motherboard. This means "companion chip == northbridge".
<strong>redkid is the source that told you fall reliable. Would you bet good money on it? I'm just trying to get a feel as to how sure you are about this fall thing. And since the 970 at 1.2ghz is rather cool running chip would we not see 970 Powerbooks at or around the same time. I don't believe we are going to have a 2 year wait to get a 970 powerbook like we did the G4 powerbook.</strong><hr></blockquote>
Hard to say exactly. I feel good about it. I was told about an IBM chip replacing moto released in the fall of 2003 last year before IBM announced anything. So the source was right about a lot of things and when the press release said 2H of 2003 and other sources have said the fall, I just feel strongly about it based on circumstances not more evidence.
Thanks, I just started wondering because I had never heard the name companion chip before, causing wild unfounded speculation racing through my head concerning other possible functions that may be rolled into the companion chip.
<strong>
This means "companion chip == northbridge".</strong><hr></blockquote>
Then Uninorth, then U2, and then with the 970...
Oh, and other than a few supprises, Programmer has the content of the chip pretty close.
<strong>
Then Uninorth, then U2, and then with the 970...</strong><hr></blockquote>
I must be dense, I do not understand your post. Could you explain it for me? Bear in mind I have very very little technical knowledge.
[ 02-04-2003: Message edited by: Ompus ]</p>
<strong>Slow-tech folks, like myself, might find <a href="http://www.cpuplanet.com/features/article.php/1490831"; target="_blank">this article</a> about basic motherboard layout informative.</strong><hr></blockquote>
Okey Dokey. I thought I had a rudimentary understanding of the cpu - northbridge - southbridge layout, but what the heck. I read the article you linked to, twice, very nice article.
But regretably no mention of Uninorth nor U2(re: nice band, used to listen to them in the 80's) I believe Apple computers use a bridge chip called Uninorth, right. But what's U2?? A chip for USB 2.0???
<strong>
Then Uninorth, then U2, and then with the 970...
Oh, and other than a few supprises, Programmer has the content of the chip pretty close.</strong><hr></blockquote>
It'll also have a DMA engine and perhaps the DSP-like features that were talked about last year. We can hope for a direct AGP 8x port as well. Is this what you are refering to TO?
___________________________________________
Did you know that the AGP 8X spec provides for a *second* AGP 8X slot? Interesting possibilities.
Apple just updated the powermacs, but I can't imagine that they wouldn't use the 970 as soon as it was available. At least by putting it in the high end only.
<strong>Forgive me if this has been asked and answered, but what is the shortest time between upgrades that Apple has ever done?
Apple just updated the powermacs, but I can't imagine that they wouldn't use the 970 as soon as it was available. At least by putting it in the high end only.</strong><hr></blockquote>
Upgrade cycle on PM usually is around 6-8 months.