<strong>Apple limps on with a G4 at 1.4 - 1.8 gig on the currently crippled DDR and BUS? Let's say we get that next April if we're lucky.
What?! IN THE FACE OF 3 GIG PLUS PENTIUM 4 AND A 64 BIT HAMMER WITH AN XP RATING OF 3.4 GIG?!!
</strong><hr></blockquote>
Can you name any IBM processors that deliver clockrates anywhere near that? Or what else makes you think they would have such an easy time competing with Intel or AMD in this regard?
[quote]<strong>The G4 is a flop. A disaster. It has failed to keep abreast of competing developments. Plain and simple.</strong><hr></blockquote>
Is anything that can't clock higher than a P4 an utter disaster in your opinion? Yes, current G4s are slower than what AMD and Intel have to offer, but that hardly qualifies them as a complete "flop". (For an example of a real flop, go to <a href="http://www.transmeta.com"; target="_blank">www.transmeta.com</a>. )
By that logic, given that the P4 actually outperforms the Power4 in several SPEC benchmarks (and at a tiny fraction of the cost), does that make the Power4 a "disaster" or "flop" too? Or the fact that it's only available in clockrates up to 1.3GHz?
[quote]<strong>
Yeesh. We're no further on nine months later than Jan 2002. What the hell is happening.
</strong><hr></blockquote>
Honestly, what do you expect? It's pretty unlikely that there's some kind of a secret technique that, if applied, will just magically boost one's clockspeed by insane amounts, and that has somehow been completely overlooked by the rest of the industry so far. Unless something very dramatic happens, it will be very difficult for anyone to surpass Intel in the next years. They have lots of talented people, and probably spend more R&D money on their processors than anyone else does.
Wellthere is a new (well not new) technique, they have that new liquid spray that over-clocks your CPU and FSB (think bathing board in liquid nitrogen)
<strong>Wellthere is a new (well not new) technique, they have that new liquid spray that over-clocks your CPU and FSB (think bathing board in liquid nitrogen) </strong><hr></blockquote>
Hehe, yeah, "we now officially have the coolest computers on the planet".
"Can you name any IBM processors that deliver clockrates anywhere near that? Or what else makes you think they would have such an easy time competing with Intel or AMD in this regard?"
Well, gee, no...SEEING AS APPLE CHOSE MOTOROLA AS THEIR 'WORKSTATION' SUPPLIER!
Clockrates?! Performance?
THE G4 doesn't have either!
IBM has the most advanced CPU tech' in the world. I figure they'd compete pretty well if given the ball. The 8 way superscalar specs on the PowerPC 64 seem to indicate where the G4 should be now.
Moto have promised G5 tech' for years...but where is it? It dropped off the desktop planet because their incompetant Managers can't run their company right.
"Is anything that can't clock higher than a P4 an utter disaster in your opinion?"
The G4 is panned in benchmarks. Trashed in Photoshop, Premiere and Lightwave? Lightwave? The Dual 1 G4 is destroyed on Lightwave renders by a single 2 gig Pentium. Mhz? Who cares? Perhaps I do about performance. The Pentium and Athlons trash the G4.
It's been this way for years. Disaster. I'D SAY SO! And the current 'updates' are not that. It's just rehashed previous releases...for the same ridiculous money and Apple can't figure the downturn on 'power'CRAP sales. Let's blame it on Quark. Let's blame it on the shrinking ring fence of Apple apologists who can't buy enough of them to stop Apple rump rumping down into a rimp.
Guess yer pretty satisfied with that and the ridiculous prices?
"Yes, current G4s are slower than what AMD and Intel have to offer,"
BZZZZZZZZZZZZZZZZZZZZZT! Sorry, that's an understatement. I can only give you a half a point.
" but that hardly qualifies them as a complete "flop". (For an example of a real flop, go to <a href="http://www.transmeta.com."; target="_blank">www.transmeta.com.</a> )
So the G4 looks good next to Transmeta. Riiiiight. Maybe the G4 is only 'half' a flop then...compared to your logic. I'd call little real progress in almost a year a 'flop.'
'By that logic, given that the P4 actually outperforms the Power4 in several SPEC benchmarks (and at a tiny fraction of the cost), does that make the Power4 a "disaster" or "flop" too? Or the fact that it's only available in clockrates up to 1.3GHz?'
The Power4 outclasses the Pentium 4. The same can't be said for the G4 over a Pentium 4.
"Honestly, what do you expect?"
Stellar performance if i'm spending £1,500 to £3,000 not less performance that any PC above a barebones config.
Decent performance for a fair price. Not outdates, botched mobo farce technology with a consumer G4 that's outclassed by any real competition.
What did I expect? Progress? For Motorola to at least keep competitive on their process tech?
To have released a god damn G5 by now!!!
"It's pretty unlikely that there's some kind of a secret technique that, if applied, will just magically boost one's clockspeed by insane amounts, and that has somehow been completely overlooked by the rest of the industry so far."
This same 'secret' technology that has failed to elude IBM on their Power4, AMD's Athlon and Intel's Pentium 4? But somehow eluded Motorola?
You keep spouting on about mhz. But, where's the performance to bolster your Moto sympathies?
"Unless something very dramatic happens, it will be very difficult for anyone to surpass Intel in the next years. They have lots of talented people, and probably spend more R&D money on their processors than anyone else does."
You're out of touch. The Hammer will give Intel the hiding they're due for. And many commentators have AMD pegged to ride 'em hard for a few years.
Similarly, the Power revisions are due and will give any Pentium or Itanic a hiding.
<strong>Well, gee, no...SEEING AS APPLE CHOSE MOTOROLA AS THEIR 'WORKSTATION' SUPPLIER!</strong><hr></blockquote>
And how does that happen to relate to the clock frequency of the Power4, for example?
[quote]<strong>
And the current 'updates' are not that. It's just rehashed previous releases...</strong><hr></blockquote>
It's an incremental update just like any other incremental update. Revolutionary updates are rare, just as they are in the x86 world.
[quote]<strong>So the G4 looks good next to Transmeta. Riiiiight. Maybe the G4 is only 'half' a flop then...compared to your logic. I'd call little real progress in almost a year a 'flop.'</strong><hr></blockquote>
Funny, the P4 went from 2.2GHz in January to 2.8GHz now, slightly more than a 27% increase. That's about 2% more "little real progress" than Moto have provided.
[quote]<strong>The Power4 outclasses the Pentium 4.</strong><hr></blockquote>
<a href="http://www.aceshardware.com/SPECmine/top.jsp"; target="_blank">See for yourself.</a> While the Power4 still has a considerably higher SPECfp score, the 2.5GHz Pentium 4 already surpasses it in SPECint.
[quote]<strong>This same 'secret' technology that has failed to elude IBM on their Power4</strong><hr></blockquote>
I was talking about clock rates - what part of "tops out at 1.3GHz" is so incredibly difficult to understand?
So, if you look around, you have Intel at roundabout 3GHz, AMD slightly above 2GHz, and Motorola, IBM, Sparc, MIPS, Transmeta, VIA, HP, Alpha and whomever I might have missed at around 1GHz. Still think Moto is just so much behind everyone else?
[quote]<strong>You keep spouting on about mhz. But, where's the performance to bolster your Moto sympathies?</strong><hr></blockquote>
Well, you were the one who said "What?! IN THE FACE OF 3 GIG PLUS PENTIUM 4 AND A 64 BIT HAMMER WITH AN XP RATING OF 3.4 GIG?!!"
As I already said in my previous post, I don't deny the fact that the G4 is slower than the P4 and the Athlon right now. My point is that this is in fact basically also true for everyone else in the desktop processor markte or anywhere near.
[quote]<strong>You're out of touch. The Hammer will give Intel the hiding they're due for. And many commentators have AMD pegged to ride 'em hard for a few years.</strong><hr></blockquote>
"It will be difficult" fortunately is not the same as "it's impossible". If the XP rating for the Hammer is about as spot-on as that for the Athlon, then XP3400+ vs. whatever Intel has to offer at the time Hammer actually ships doesn't look like the Hammer will outright kill the P4.
[quote]<strong>Similarly, the Power revisions are due and will give any Pentium or Itanic a hiding.
A few weeks ago I asked how hard it would be to design a multiprocessor system where one processor was a "pure Altivec" chip and the other processor was some kind of "non-Altivec" PowerPC chip.
I asked this because Apple has invested a lot of resources to optimize their code for Altivec, but future chip suppliers may be unwilling or unable to design chips with Altivec-processing units. Since Apple likes options, and they probably want to protect their investment in Altivec, it would make sense for them to investigate this possibility. If they had a "pure Altivec" chip and a motherboard that supported it, then they could plug in any future PowerPC chip from IBM or Motorola whether it supported Altivec or not.
This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?
Just curious, especially given the recent rumors/info about the chip IBM will be discussing in October.
<strong>A few weeks ago I asked how hard it would be to design a multiprocessor system where one processor was a "pure Altivec" chip and the other processor was some kind of "non-Altivec" PowerPC chip.
I asked this because Apple has invested a lot of resources to optimize their code for Altivec, but future chip suppliers may be unwilling or unable to design chips with Altivec-processing units. Since Apple likes options, and they probably want to protect their investment in Altivec, it would make sense for them to investigate this possibility. If they had a "pure Altivec" chip and a motherboard that supported it, then they could plug in any future PowerPC chip from IBM or Motorola whether it supported Altivec or not.
This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?
Just curious, especially given the recent rumors/info about the chip IBM will be discussing in October.</strong><hr></blockquote>
Interesting point of vue, but i fear that a separated Altivec unit will introduce a superior latency when switching from an altivec mode to a current one.
It's more simple to have the altivec unit on the same chip and it's cheaper.
In the past Apple has try DSP chip, and was intrested in philips trimedia chips : he never used it. I doubt that he will backpedal now.
OK kids, I just got off the phone with two people. One of which I posted about before and was right about the Apollo G4 in every respect except was off on the date by apx. one month. The other is even closer to me (more trusted), and works for a "global business machine" company. *Cough.
Don't ask, don't tell. However, you can dig up my previous posts from the same sources and see how right they were.
Anyway... now that all the now obligitory "what's your source" crap is out of the way...
Apparently Apple will have two options next year with regards to CPU. Moto is working on a "next generation desktop proc for Apple" (direct quote), and although my cousin, who is my Moto guy, is not in on the project, his friends are, and that is all they will ever say. Time frame = 6-9 months. I don't know if that's shipping in quantity to Apple, first one rolls out, or what.
Choice #2 is from IBM. They ARE working on a "Powerish" (another direct quote) chip for "the desktop market." No mention of Apple, but we can guess a little bit, right? I am in no way a chip designer, or even a marginal geek, so I don't know how this plays out with respect to everything technical that's been discussed here. The only thing I know is that it is based on an IBM Power design, it is 64-bit (I asked, even though I don't really understand what that means!), and is designed for the desktop computer. Time frame = 6-10 months to "completion". This may be what is going to be discussed in October. Also, I have no idea what "completion" means in this context.
Speculate away. Are there more specific questions that I could ask these two people that could help us figure out what is coming without jeopardizing their jobs? Help me help you.
<strong>OK kids, I just got off the phone with two people. One of which I posted about before and was right about the Apollo G4 in every respect except was off on the date by apx. one month. The other is even closer to me (more trusted), and works for a "global business machine" company. *Cough.
Don't ask, don't tell. However, you can dig up my previous posts from the same sources and see how right they were.
Anyway... now that all the now obligitory "what's your source" crap is out of the way...
Apparently Apple will have two options next year with regards to CPU. Moto is working on a "next generation desktop proc for Apple" (direct quote), and although my cousin, who is my Moto guy, is not in on the project, his friends are, and that is all they will ever say. Time frame = 6-9 months. I don't know if that's shipping in quantity to Apple, first one rolls out, or what.
Choice #2 is from IBM. They ARE working on a "Powerish" (another direct quote) chip for "the desktop market." No mention of Apple, but we can guess a little bit, right? I am in no way a chip designer, or even a marginal geek, so I don't know how this plays out with respect to everything technical that's been discussed here. The only thing I know is that it is based on an IBM Power design, it is 64-bit (I asked, even though I don't really understand what that means!), and is designed for the desktop computer. Time frame = 6-10 months to "completion". This may be what is going to be discussed in October. Also, I have no idea what "completion" means in this context.
Speculate away. Are there more specific questions that I could ask these two people that could help us figure out what is coming without jeopardizing their jobs? Help me help you. </strong><hr></blockquote>
Ask the mot guy two questions : is this new desktop chip have a new core, 32 bits or 64 bits and a new bus interface aka rapid I/O
Askt the IBM guy one question did this chip will have altivec compatible SIMD unit in it.
<strong>This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
</strong><hr></blockquote>
Nope, it doesn't work like that. The OS doesn't "send" instructions to the execution unit directly. Rather, it assigns a thread to the CPU, which then continuously fetches instructions from that thread's instruction stream, decodes them, and then decides which execution unit to dispatch them to. This dispatching is a hardware thing, the OS is not involved at all.
Thus, if you want to maintain binary compatibility with the current system, you have two options (that I can think of right now ):
On the one hand, you could specifially design the CPU to support "delegating" instructions to external execution units (like the Auxiliary Processing Units on the upcoming MPC8540 - though these are still on the same chip as the core itself, I believe). This could work at an acceptable speed, but any processor you wnat to use would have to support that functionality.
The other option is a purely software one and would involve modifiying the OS:
Whenever a CPU generates an invalid opcode exception, the OS' exception handler would examine the opcode in question. If it's in fact a valid opcode that just happens to be not supported on the current CPU, it would then send it to the appropriate coprocessor (if present). Unfortunately, this solution is slow, very slow.
[quote]<strong>The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?</strong><hr></blockquote>
It wouldn't really help too much - with any current form of multiprocessing, a single thread always runs on exactly one processor at any given point in time. There's no such thing as spreading instructions across multiple processors on a sub-thread level (otherwise programs would take advantage of SMP automatically, BTW).
Apple's problems with processors is the with the G4 they bought on to once suppliers propriatary chip, thus limiting internal competition within the allicance to develop faster chips. Apple should have worked hard to keep IBM and Moto building and developing compatible chips that Apple could use.
Instead they bought into AltiVec, and are apparently stuck with it for right now. IBM has been limited in their G3 design due to this, becouse it has been a "consumer" processor, and Apple would not buy one faster than their G4 counterparts. IBM might lab test the chips higher, but they are going to sell them as ordered by thier client. If Apple never requested a 1ghz Sierra, then IBM probably wont test the chips coming off the line at 1ghz, instead testing, and stamping them at 700mhz becouse that is what was ordered.
The big question for the future is how will Apple resove this problem, which they have to do to stay in buisness. Can they drop AltiVec either all together or convert to another standard. How much development time will it take Apple to alter their OS and other software to take advantage of a new SIMD, and can they keep their developers on board to adopt/optamize their software for yet another SIMD. And last but not least, in donig so how would that effect the current and future G4 products that still use Alti-Vec.
I have a feeling that most people could care less what SIMD Apple uses, or if they have one at all, as long as they dont see a performance hit from the switch. As for the developers, that is a harder "sell".
We haven't heard from Moki on this new rumor. He was right about no new Powermacs at MWNY but something soon afterwards. He states earlier in this thread that Apple will be looking to use the desktop Power4 (not a direct quote). He has pretty good with his information if a little fuzzy. I find it hard to believe Apple wouldn't even consider it as the newest rumor said.
What I don't understand is that there were already rumors a while back that Moto had presented Apple with a design for a "G5" and Apple supposedly rejected it. I remember people being pretty convinced of it for a while. Apple couldn't have rejected both of the offers, theres no way they're going to X86 at this point in time. One of these rumors have to be wrong.
might this be what we're looking for?? Sure, it runs hot, but shrink it from .22 microns to .13 or so and I'm sure things will cool off.. and it's got only 19 mil transistors, compared to 120 mil or so for the power4...
from IBM, of course...
The Rivina 64-bit PowerPC processor is a fully compliant implementation of the 64-bit PowerPC (TM) instruction set architecture. The design uses the same "delayed-reset" dynamic circuit family as the previously completed "guTS" integer processor. Control logic is realized entirely in programmable logic arrays (PLAs), followed by a single level of static or dynamic circuits. The 4kB single cycle caches used in the integer prototype were replaced with two-cycle 64kB caches.
Unlike typical GHz processor with pipelines that range f rom 14-20 stages, the Rivina pipeline contains just 6 stages, and many operations are completed in a single cycle. A full address translation unit was added, as well as a dual-precision IEEE compliant floating-point unit. Clock distribution was also vastly improved, with total clock skew less than 16ps across the chip. The new fixed-point adder architecture incorporated in this design is also used to speed up IBM's current commercial i- and p- series e-servers.
The processor contains many additional micro-architectural innovations such as instruction dependency prediction, and novel implementations of data cache set prediction, a history file mechanism, and innovations in the organization of the floating-point unit. The processor contains 19 million transistors, and was built in IBM's 0.22 micron CMOS process using copper interconnect. The processor dissipates 112 Watts at 1.15 GHz.
The design was completed at an expense of less than twenty researchers over a period of about two years.
<strong>might this be what we're looking for?? Sure, it runs hot, but shrink it from .22 microns to .13 or so and I'm sure things will cool off.. and it's got only 19 mil transistors, compared to 120 mil or so for the power4...
from IBM, of course...
The Rivina 64-bit PowerPC processor is a fully compliant implementation of the 64-bit PowerPC (TM) instruction set architecture. The design uses the same "delayed-reset" dynamic circuit family as the previously completed "guTS" integer processor. Control logic is realized entirely in programmable logic arrays (PLAs), followed by a single level of static or dynamic circuits. The 4kB single cycle caches used in the integer prototype were replaced with two-cycle 64kB caches.
Unlike typical GHz processor with pipelines that range f rom 14-20 stages, the Rivina pipeline contains just 6 stages, and many operations are completed in a single cycle. A full address translation unit was added, as well as a dual-precision IEEE compliant floating-point unit. Clock distribution was also vastly improved, with total clock skew less than 16ps across the chip. The new fixed-point adder architecture incorporated in this design is also used to speed up IBM's current commercial i- and p- series e-servers.
The processor contains many additional micro-architectural innovations such as instruction dependency prediction, and novel implementations of data cache set prediction, a history file mechanism, and innovations in the organization of the floating-point unit. The processor contains 19 million transistors, and was built in IBM's 0.22 micron CMOS process using copper interconnect. The processor dissipates 112 Watts at 1.15 GHz.
The design was completed at an expense of less than twenty researchers over a period of about two years.
Good find. I was expecting longer pipelines, a smaller process, and either higher clock speed or more transisters. I fear that this will not be as much of a speed deamon as I was hoping.
<strong>Apple won't use it cause it doesn't contain any vector units there.....
I don't know should I say Apple is stubborn or smart.
</strong><hr></blockquote>
Well, look around. Given the fact that almost all current chips aimed at the desktop market sport a vector unit, there seems to be a general consensus that these are in fact a good thing to have.
Comments
<strong>Apple limps on with a G4 at 1.4 - 1.8 gig on the currently crippled DDR and BUS? Let's say we get that next April if we're lucky.
What?! IN THE FACE OF 3 GIG PLUS PENTIUM 4 AND A 64 BIT HAMMER WITH AN XP RATING OF 3.4 GIG?!!
</strong><hr></blockquote>
Can you name any IBM processors that deliver clockrates anywhere near that? Or what else makes you think they would have such an easy time competing with Intel or AMD in this regard?
[quote]<strong>The G4 is a flop. A disaster. It has failed to keep abreast of competing developments. Plain and simple.</strong><hr></blockquote>
Is anything that can't clock higher than a P4 an utter disaster in your opinion? Yes, current G4s are slower than what AMD and Intel have to offer, but that hardly qualifies them as a complete "flop". (For an example of a real flop, go to <a href="http://www.transmeta.com"; target="_blank">www.transmeta.com</a>.
By that logic, given that the P4 actually outperforms the Power4 in several SPEC benchmarks (and at a tiny fraction of the cost), does that make the Power4 a "disaster" or "flop" too? Or the fact that it's only available in clockrates up to 1.3GHz?
[quote]<strong>
Yeesh. We're no further on nine months later than Jan 2002. What the hell is happening.
</strong><hr></blockquote>
Honestly, what do you expect? It's pretty unlikely that there's some kind of a secret technique that, if applied, will just magically boost one's clockspeed by insane amounts, and that has somehow been completely overlooked by the rest of the industry so far. Unless something very dramatic happens, it will be very difficult for anyone to surpass Intel in the next years. They have lots of talented people, and probably spend more R&D money on their processors than anyone else does.
Bye,
RazzFazz
[ 09-06-2002: Message edited by: RazzFazz ]</p>
<strong>Wellthere is a new (well not new) technique, they have that new liquid spray that over-clocks your CPU and FSB (think bathing board in liquid nitrogen)
Hehe, yeah, "we now officially have the coolest computers on the planet".
Bye,
RazzFazz
Well, gee, no...SEEING AS APPLE CHOSE MOTOROLA AS THEIR 'WORKSTATION' SUPPLIER!
Clockrates?! Performance?
THE G4 doesn't have either!
IBM has the most advanced CPU tech' in the world. I figure they'd compete pretty well if given the ball. The 8 way superscalar specs on the PowerPC 64 seem to indicate where the G4 should be now.
Moto have promised G5 tech' for years...but where is it? It dropped off the desktop planet because their incompetant Managers can't run their company right.
"Is anything that can't clock higher than a P4 an utter disaster in your opinion?"
The G4 is panned in benchmarks. Trashed in Photoshop, Premiere and Lightwave? Lightwave? The Dual 1 G4 is destroyed on Lightwave renders by a single 2 gig Pentium. Mhz? Who cares? Perhaps I do about performance. The Pentium and Athlons trash the G4.
It's been this way for years. Disaster. I'D SAY SO! And the current 'updates' are not that. It's just rehashed previous releases...for the same ridiculous money and Apple can't figure the downturn on 'power'CRAP sales. Let's blame it on Quark. Let's blame it on the shrinking ring fence of Apple apologists who can't buy enough of them to stop Apple rump rumping down into a rimp.
Guess yer pretty satisfied with that and the ridiculous prices?
"Yes, current G4s are slower than what AMD and Intel have to offer,"
BZZZZZZZZZZZZZZZZZZZZZT! Sorry, that's an understatement. I can only give you a half a point.
" but that hardly qualifies them as a complete "flop". (For an example of a real flop, go to <a href="http://www.transmeta.com."; target="_blank">www.transmeta.com.</a> )
So the G4 looks good next to Transmeta. Riiiiight. Maybe the G4 is only 'half' a flop then...compared to your logic. I'd call little real progress in almost a year a 'flop.'
'By that logic, given that the P4 actually outperforms the Power4 in several SPEC benchmarks (and at a tiny fraction of the cost), does that make the Power4 a "disaster" or "flop" too? Or the fact that it's only available in clockrates up to 1.3GHz?'
The Power4 outclasses the Pentium 4. The same can't be said for the G4 over a Pentium 4.
"Honestly, what do you expect?"
Stellar performance if i'm spending £1,500 to £3,000 not less performance that any PC above a barebones config.
Decent performance for a fair price. Not outdates, botched mobo farce technology with a consumer G4 that's outclassed by any real competition.
What did I expect? Progress? For Motorola to at least keep competitive on their process tech?
To have released a god damn G5 by now!!!
"It's pretty unlikely that there's some kind of a secret technique that, if applied, will just magically boost one's clockspeed by insane amounts, and that has somehow been completely overlooked by the rest of the industry so far."
This same 'secret' technology that has failed to elude IBM on their Power4, AMD's Athlon and Intel's Pentium 4? But somehow eluded Motorola?
You keep spouting on about mhz. But, where's the performance to bolster your Moto sympathies?
"Unless something very dramatic happens, it will be very difficult for anyone to surpass Intel in the next years. They have lots of talented people, and probably spend more R&D money on their processors than anyone else does."
You're out of touch. The Hammer will give Intel the hiding they're due for. And many commentators have AMD pegged to ride 'em hard for a few years.
Similarly, the Power revisions are due and will give any Pentium or Itanic a hiding.
'BYYYYYYYYYYYYYYYYEE!'
Lemon Bon Bon
<strong>Well, gee, no...SEEING AS APPLE CHOSE MOTOROLA AS THEIR 'WORKSTATION' SUPPLIER!</strong><hr></blockquote>
And how does that happen to relate to the clock frequency of the Power4, for example?
[quote]<strong>
And the current 'updates' are not that. It's just rehashed previous releases...</strong><hr></blockquote>
It's an incremental update just like any other incremental update. Revolutionary updates are rare, just as they are in the x86 world.
[quote]<strong>So the G4 looks good next to Transmeta. Riiiiight. Maybe the G4 is only 'half' a flop then...compared to your logic. I'd call little real progress in almost a year a 'flop.'</strong><hr></blockquote>
Funny, the P4 went from 2.2GHz in January to 2.8GHz now, slightly more than a 27% increase. That's about 2% more "little real progress" than Moto have provided.
[quote]<strong>The Power4 outclasses the Pentium 4.</strong><hr></blockquote>
<a href="http://www.aceshardware.com/SPECmine/top.jsp"; target="_blank">See for yourself.</a> While the Power4 still has a considerably higher SPECfp score, the 2.5GHz Pentium 4 already surpasses it in SPECint.
[quote]<strong>This same 'secret' technology that has failed to elude IBM on their Power4</strong><hr></blockquote>
I was talking about clock rates - what part of "tops out at 1.3GHz" is so incredibly difficult to understand?
So, if you look around, you have Intel at roundabout 3GHz, AMD slightly above 2GHz, and Motorola, IBM, Sparc, MIPS, Transmeta, VIA, HP, Alpha and whomever I might have missed at around 1GHz. Still think Moto is just so much behind everyone else?
[quote]<strong>You keep spouting on about mhz. But, where's the performance to bolster your Moto sympathies?</strong><hr></blockquote>
Well, you were the one who said "What?! IN THE FACE OF 3 GIG PLUS PENTIUM 4 AND A 64 BIT HAMMER WITH AN XP RATING OF 3.4 GIG?!!"
As I already said in my previous post, I don't deny the fact that the G4 is slower than the P4 and the Athlon right now. My point is that this is in fact basically also true for everyone else in the desktop processor markte or anywhere near.
[quote]<strong>You're out of touch. The Hammer will give Intel the hiding they're due for. And many commentators have AMD pegged to ride 'em hard for a few years.</strong><hr></blockquote>
"It will be difficult" fortunately is not the same as "it's impossible". If the XP rating for the Hammer is about as spot-on as that for the Athlon, then XP3400+ vs. whatever Intel has to offer at the time Hammer actually ships doesn't look like the Hammer will outright kill the P4.
[quote]<strong>Similarly, the Power revisions are due and will give any Pentium or Itanic a hiding.
</strong><hr></blockquote>
Any more info on that?
Bye,
RazzFazz
[ 09-06-2002: Message edited by: RazzFazz ]</p>
I asked this because Apple has invested a lot of resources to optimize their code for Altivec, but future chip suppliers may be unwilling or unable to design chips with Altivec-processing units. Since Apple likes options, and they probably want to protect their investment in Altivec, it would make sense for them to investigate this possibility. If they had a "pure Altivec" chip and a motherboard that supported it, then they could plug in any future PowerPC chip from IBM or Motorola whether it supported Altivec or not.
This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?
Just curious, especially given the recent rumors/info about the chip IBM will be discussing in October.
<strong>A few weeks ago I asked how hard it would be to design a multiprocessor system where one processor was a "pure Altivec" chip and the other processor was some kind of "non-Altivec" PowerPC chip.
I asked this because Apple has invested a lot of resources to optimize their code for Altivec, but future chip suppliers may be unwilling or unable to design chips with Altivec-processing units. Since Apple likes options, and they probably want to protect their investment in Altivec, it would make sense for them to investigate this possibility. If they had a "pure Altivec" chip and a motherboard that supported it, then they could plug in any future PowerPC chip from IBM or Motorola whether it supported Altivec or not.
This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?
Just curious, especially given the recent rumors/info about the chip IBM will be discussing in October.</strong><hr></blockquote>
Interesting point of vue, but i fear that a separated Altivec unit will introduce a superior latency when switching from an altivec mode to a current one.
It's more simple to have the altivec unit on the same chip and it's cheaper.
In the past Apple has try DSP chip, and was intrested in philips trimedia chips : he never used it. I doubt that he will backpedal now.
Don't ask, don't tell. However, you can dig up my previous posts from the same sources and see how right they were.
Anyway... now that all the now obligitory "what's your source" crap is out of the way...
Apparently Apple will have two options next year with regards to CPU. Moto is working on a "next generation desktop proc for Apple" (direct quote), and although my cousin, who is my Moto guy, is not in on the project, his friends are, and that is all they will ever say. Time frame = 6-9 months. I don't know if that's shipping in quantity to Apple, first one rolls out, or what.
Choice #2 is from IBM. They ARE working on a "Powerish" (another direct quote) chip for "the desktop market." No mention of Apple, but we can guess a little bit, right? I am in no way a chip designer, or even a marginal geek, so I don't know how this plays out with respect to everything technical that's been discussed here. The only thing I know is that it is based on an IBM Power design, it is 64-bit (I asked, even though I don't really understand what that means!), and is designed for the desktop computer. Time frame = 6-10 months to "completion". This may be what is going to be discussed in October. Also, I have no idea what "completion" means in this context.
Speculate away. Are there more specific questions that I could ask these two people that could help us figure out what is coming without jeopardizing their jobs? Help me help you.
<strong>OK kids, I just got off the phone with two people. One of which I posted about before and was right about the Apollo G4 in every respect except was off on the date by apx. one month. The other is even closer to me (more trusted), and works for a "global business machine" company. *Cough.
Don't ask, don't tell. However, you can dig up my previous posts from the same sources and see how right they were.
Anyway... now that all the now obligitory "what's your source" crap is out of the way...
Apparently Apple will have two options next year with regards to CPU. Moto is working on a "next generation desktop proc for Apple" (direct quote), and although my cousin, who is my Moto guy, is not in on the project, his friends are, and that is all they will ever say. Time frame = 6-9 months. I don't know if that's shipping in quantity to Apple, first one rolls out, or what.
Choice #2 is from IBM. They ARE working on a "Powerish" (another direct quote) chip for "the desktop market." No mention of Apple, but we can guess a little bit, right? I am in no way a chip designer, or even a marginal geek, so I don't know how this plays out with respect to everything technical that's been discussed here. The only thing I know is that it is based on an IBM Power design, it is 64-bit (I asked, even though I don't really understand what that means!), and is designed for the desktop computer. Time frame = 6-10 months to "completion". This may be what is going to be discussed in October. Also, I have no idea what "completion" means in this context.
Speculate away. Are there more specific questions that I could ask these two people that could help us figure out what is coming without jeopardizing their jobs? Help me help you.
Ask the mot guy two questions : is this new desktop chip have a new core, 32 bits or 64 bits and a new bus interface aka rapid I/O
Askt the IBM guy one question did this chip will have altivec compatible SIMD unit in it.
Thanks in advance for all the Apple community.
<strong>This scenario doesn't sound too difficult on the software side. The operating system is already designed to send Altivec instructions to a separate processing unit. Now it would have to be modified to send those instructions to a separate processor.
</strong><hr></blockquote>
Nope, it doesn't work like that. The OS doesn't "send" instructions to the execution unit directly. Rather, it assigns a thread to the CPU, which then continuously fetches instructions from that thread's instruction stream, decodes them, and then decides which execution unit to dispatch them to. This dispatching is a hardware thing, the OS is not involved at all.
Thus, if you want to maintain binary compatibility with the current system, you have two options (that I can think of right now
On the one hand, you could specifially design the CPU to support "delegating" instructions to external execution units (like the Auxiliary Processing Units on the upcoming MPC8540 - though these are still on the same chip as the core itself, I believe). This could work at an acceptable speed, but any processor you wnat to use would have to support that functionality.
The other option is a purely software one and would involve modifiying the OS:
Whenever a CPU generates an invalid opcode exception, the OS' exception handler would examine the opcode in question. If it's in fact a valid opcode that just happens to be not supported on the current CPU, it would then send it to the appropriate coprocessor (if present). Unfortunately, this solution is slow, very slow.
[quote]<strong>The hardware side is probably more difficult. Does anyone have a sense of how difficult it would be? Would moving to NUMA-designs make this scenario more likely/easier?</strong><hr></blockquote>
It wouldn't really help too much - with any current form of multiprocessing, a single thread always runs on exactly one processor at any given point in time. There's no such thing as spreading instructions across multiple processors on a sub-thread level (otherwise programs would take advantage of SMP automatically, BTW).
Bye,
RazzFazz
Instead they bought into AltiVec, and are apparently stuck with it for right now. IBM has been limited in their G3 design due to this, becouse it has been a "consumer" processor, and Apple would not buy one faster than their G4 counterparts. IBM might lab test the chips higher, but they are going to sell them as ordered by thier client. If Apple never requested a 1ghz Sierra, then IBM probably wont test the chips coming off the line at 1ghz, instead testing, and stamping them at 700mhz becouse that is what was ordered.
The big question for the future is how will Apple resove this problem, which they have to do to stay in buisness. Can they drop AltiVec either all together or convert to another standard. How much development time will it take Apple to alter their OS and other software to take advantage of a new SIMD, and can they keep their developers on board to adopt/optamize their software for yet another SIMD. And last but not least, in donig so how would that effect the current and future G4 products that still use Alti-Vec.
I have a feeling that most people could care less what SIMD Apple uses, or if they have one at all, as long as they dont see a performance hit from the switch. As for the developers, that is a harder "sell".
from IBM, of course...
The Rivina 64-bit PowerPC processor is a fully compliant implementation of the 64-bit PowerPC (TM) instruction set architecture. The design uses the same "delayed-reset" dynamic circuit family as the previously completed "guTS" integer processor. Control logic is realized entirely in programmable logic arrays (PLAs), followed by a single level of static or dynamic circuits. The 4kB single cycle caches used in the integer prototype were replaced with two-cycle 64kB caches.
Unlike typical GHz processor with pipelines that range f rom 14-20 stages, the Rivina pipeline contains just 6 stages, and many operations are completed in a single cycle. A full address translation unit was added, as well as a dual-precision IEEE compliant floating-point unit. Clock distribution was also vastly improved, with total clock skew less than 16ps across the chip. The new fixed-point adder architecture incorporated in this design is also used to speed up IBM's current commercial i- and p- series e-servers.
The processor contains many additional micro-architectural innovations such as instruction dependency prediction, and novel implementations of data cache set prediction, a history file mechanism, and innovations in the organization of the floating-point unit. The processor contains 19 million transistors, and was built in IBM's 0.22 micron CMOS process using copper interconnect. The processor dissipates 112 Watts at 1.15 GHz.
The design was completed at an expense of less than twenty researchers over a period of about two years.
mav
<strong>might this be what we're looking for?? Sure, it runs hot, but shrink it from .22 microns to .13 or so and I'm sure things will cool off.. and it's got only 19 mil transistors, compared to 120 mil or so for the power4...
from IBM, of course...
The Rivina 64-bit PowerPC processor is a fully compliant implementation of the 64-bit PowerPC (TM) instruction set architecture. The design uses the same "delayed-reset" dynamic circuit family as the previously completed "guTS" integer processor. Control logic is realized entirely in programmable logic arrays (PLAs), followed by a single level of static or dynamic circuits. The 4kB single cycle caches used in the integer prototype were replaced with two-cycle 64kB caches.
Unlike typical GHz processor with pipelines that range f rom 14-20 stages, the Rivina pipeline contains just 6 stages, and many operations are completed in a single cycle. A full address translation unit was added, as well as a dual-precision IEEE compliant floating-point unit. Clock distribution was also vastly improved, with total clock skew less than 16ps across the chip. The new fixed-point adder architecture incorporated in this design is also used to speed up IBM's current commercial i- and p- series e-servers.
The processor contains many additional micro-architectural innovations such as instruction dependency prediction, and novel implementations of data cache set prediction, a history file mechanism, and innovations in the organization of the floating-point unit. The processor contains 19 million transistors, and was built in IBM's 0.22 micron CMOS process using copper interconnect. The processor dissipates 112 Watts at 1.15 GHz.
The design was completed at an expense of less than twenty researchers over a period of about two years.
mav</strong><hr></blockquote>
Where did you get this info from?
<strong>
Where did you get this info from?</strong><hr></blockquote>
<a href="http://researchweb.watson.ibm.com/arl/projects/rivina.html"; target="_blank">http://researchweb.watson.ibm.com/arl/projects/rivina.html</a>;
I don't know should I say Apple is stubborn or smart.
[ 09-07-2002: Message edited by: Leonis ]</p>
<strong>Apple won't use it cause it doesn't contain any vector units there.....
I don't know should I say Apple is stubborn or smart.
</strong><hr></blockquote>
Well, look around. Given the fact that almost all current chips aimed at the desktop market sport a vector unit, there seems to be a general consensus that these are in fact a good thing to have.
Bye,
RazzFazz