Breaking Through Compute Intensive Barriers - IBM's New 64-bit PowerPC Microprocessor
Peter Sandon, Senior Processor Architect, Power PC Organization, IBM Microelectronics
IBM is disclosing the technical details of a new 64-bit PowerPC microprocessor designed for desktops and entry-level servers. Based on the award winning Power4 design, this processor is an 8-way superscalar design that fully supports Symmetric MultiProcessing. The processor is further enhanced by a vector processing unit implementing over 160 specialized vector instructions and implements a system interface capable of up to 6.4GB/s.
Emphasis added. Altivec comprises 162 instructions - will IBM finally implement it? Are there any other desktop OSs on PowerPC apart from MacOSX? AIX maybe?
Interestingly, there are no anouncements by Motorola on the MPF homepage... . Maybe the G4 will be Moto's last desktop-capable processor for real?</strong><hr></blockquote>
I predict that this new processor will be a birthday present for Mac OS X. While IBM's new plant is up now it won't be fully ramped up until early next year. Even if this chips exists today it would be too expensive for Apple to use in desktops before late March. We might see it in the Xserve a litle sooner. Until then all I expect is speedbumped G4s.
<strong>Emulation for AltiVec sounds like a bad idea!</strong><hr></blockquote>
It depends on how IBM decided to do it. Velocity Engine programmers use a macro language to program the unit instead of banging on bare metal, so there's currently "emulation" in the sense that the instruction codes are translated into the AltiVec ISA. Right now, as I understand it, that translation is trivial. 1 macro becomes 1 instruction.
As long as the translation of the Velocity Engine macro language to the IBM ISA isn't especially difficult or cumbersome (e.g., the vector permute function doesn't map to a long series of bit-twiddling ops in the integer units!) it should work fine.
[quote]I would not read ANYTHING into the Oct 15 date for the presentation other than that is when those PowerPoint slides will be complete.<hr></blockquote>
-except for the .pdf with that pic. that was going around noting one MASSIVE heat sink in next weeks supposed new towers. <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
Actually, there are several interesting passages in the article from <a href="http://www.heise.de,"; target="_blank">www.heise.de,</a> and being a Dane I have translated them here:
"... and it furthermore includes a SIMD-extension offering 160 commands. This is not AltiVec compatible (that is, with its own 128-bit unit [bus?]); instead it addresses the 64-bit CPU registers directly, apparently making it compatible with the extension for Embedded [processors] (Book E) which was planned in cooperation with Motorola. Motorola just recently presented the communication processors MPC8560 and MPC8540, and they also include such a new SIMD extension ....."
"Thus, IBM's stubborn refusal to include an AltiVec unit makes sense, if better-performing SIMD possibilities in a 64-bit unit were in the works, and they didn't want to introduce temporary, non-compatible solutions. However, in the new processors the AltiVec-commands can be emulated in software in the traditional manner."
The words in square brackets [] are my additions, attempting to clarify the text further...
Does anyone know more about the "new SIMD extension" in the two Motorola communications processors? Any comments when comparing it to AltiVec?
<strong>Actually, there are several interesting passages in the article from <a href="http://www.heise.de,"; target="_blank">www.heise.de,</a> and being a Dane I have translated them here:
</strong><hr></blockquote>
this is why i love europe... a dane living in turkey translates a german article about two american companies to english for the rest of the world to understand.
Is it that IBM didn't want to include Altivec or the fact that the Altivec Apple and Mot wanted to use wasn't 64-bit clean. That would make sense as to why IBM told them other guys to sod off.
There,s discussion at Ars by BadAndy relevent to 64-bit altivec in the IBM thread.
<strong>There is a big difference between announcing a produce from a marketing standpoint, and presenting technology at Conferences. Formal announcements usually are made outside of Conferences unless the conference also happens to be a major marketing tradeshow that coincides with your desired release date anyway.
I would not read ANYTHING into the Oct 15 date for the presentation other than that is when those PowerPoint slides will be complete.
</strong><hr></blockquote>Just to give more context to this, the 750fx Sahara was first introduced at the microprocessor forum last October, and then found its way into iBooks in May of the next year, about 7 months later. And I'm sure other time frames have varied wildly. I.e., who can tell how far away this thing is?
<strong>"... and it furthermore includes a SIMD-extension offering 160 commands. This is not AltiVec compatible (that is, with its own 128-bit unit [bus?]); instead it addresses the 64-bit CPU registers directly, apparently making it compatible with the extension for Embedded [processors] (Book E) which was planned in cooperation with Motorola...."
</strong><hr></blockquote>
Book E does not specify any SIMD-unit... I've searched through the Book E paper.
And Im pretty sure the SIMD used in Motorola embedded PPC is not a 160+ instruction extension. Maybe I could try to find more info about that.
The Motorola SIMD design for their "G5" embedded processors, which are Book "E", use the integer registers to hold the data for the SIMD operations. These registers are half (or a quarter) the size of the AltiVec registers, dramatically reducing the usefulness of this kind of implementation... not to mention they are the same 32 registers instead of the additional 32 registers that AltiVec uses. This style of SIMD implementation is what IBM used in the Gekko for Nintendo -- each 64-bit FPU register held 2 single precision floats -- but that design was a gross hack instead of the impressive general purpose vector engine that is the AltiVec unit.
Its possible IBM has chosen to go this route, but I really hope not... and I don't believe so. First of all there are several explicit references to VMX, and that is AltiVec. Second, this new desktop processor is not embedded and thus probably not Book "E" compliant. Third, emulating the AltiVec unit on top of something using the integer registers simply isn't possible to do efficiently since it would clobber the data used by the integer unit.
I think that site is just blowing smoke, and until there is real evidence to the contrary I'm going to continue to believe that IBM has implemented a VMX unit. It is possible that this might internally involve cracking the VMX instructions and feeding them to multiple execution units, but as long as that is at least as fast it doesn't really matter.
I've also seen comments that the description of the new processor is 8-way superscalar meaning it has 8 execution units... there is another (more common) meaning for "N-way" superscalar, and that is the number of instructions dispatched per clock cycle. The G4 has more than 4 execution units, but is classified as 4-way. Moto's G5 has more than 2 units, but is classified as 2-way. I think this is more likely, and therefore the new IBM processor will dispatch up to 8 instructions per clock to some number of execution units... probably a rather large number of units (i.e. > 8).
All just speculation, of course, but it is more in line with the expected number of transistors than much of the other speculation out there.
I've also seen comments that the description of the new processor is 8-way superscalar meaning it has 8 execution units... there is another (more common) meaning for "N-way" superscalar, and that is the number of instructions dispatched per clock cycle.</strong>
The meaning of superscalar has always been the number of instructions dispatched per clock cycle. This other way is more symptomatic of market-droid naming conventions or common misconceptions then anything else.
8-way superscalar though, shazam! That better be one efficient compiler!
Its been a long time since there's been so much exitement on these boards. My personal take, reading the the runes is that ;
a) There will be a a proper Altivec/VMX VPU on board (Bad Andy suggests that a 64bit split/emulation/fudge would not hack it)
b) The '64bit' chip being presented in October is NOT the chip that Apple will use; there will be 32 bit variant embargoed until Apple announce (six-seven months?) and OSX will migrate to 64 bit in due course.
This all leaves Apple with a bit of a medium term PR headache and I suspect the 'iPower5' (whatever) will be going into a higher tier box ($5-6K, 2U rackmount?) for the 3D render, recording studio, film editing, too much money crowd (like me, yummm). The G4 will continue for at least another 18 months.
<strong>Its been a long time since there's been so much exitement on these boards. My personal take, reading the the runes is that ;
a) There will be a a proper Altivec/VMX VPU on board (Bad Andy suggests that a 64bit split/emulation/fudge would not hack it)
b) The '64bit' chip being presented in October is NOT the chip that Apple will use; there will be 32 bit variant embargoed until Apple announce (six-seven months?) and OSX will migrate to 64 bit in due course.
This all leaves Apple with a bit of a medium term PR headache and I suspect the 'iPower5' (whatever) will be going into a higher tier box ($5-6K, 2U rackmount?) for the 3D render, recording studio, film editing, too much money crowd (like me, yummm). The G4 will continue for at least another 18 months.</strong><hr></blockquote>
I don't think they'd waste their effort building a 32-bit version of it. More likely Apple wouldn't tell anyone it was a 64-bit CPU until 10.3 ships and suddenly flips the "64-bit mode" bit for any application that wants to be 64-bit. Oh look, 64-bit code.
Or they've had MacOSX running on POWER4s and PPC620s for the last 3 years and the 64-bit support is already there (perhaps Cocoa only?).
I don't think they'd waste their effort building a 32-bit version of it. More likely Apple wouldn't tell anyone it was a 64-bit CPU until 10.3 ships and suddenly flips the "64-bit mode" bit for any application that wants to be 64-bit. Oh look, 64-bit code.
Or they've had MacOSX running on POWER4s and PPC620s for the last 3 years and the 64-bit support is already there (perhaps Cocoa only?).
</strong><hr></blockquote>
64 bit + Jaguar = No booting into OS 9? Could that be the reason?
[quote]b) The '64bit' chip being presented in October is NOT the chip that Apple will use; there will be 32 bit variant embargoed until Apple announce (six-seven months?) and OSX will migrate to 64 bit in due course.<hr></blockquote>
Im pretty sure it will be backwards compatible with 32bit apps, wasnt that a design element in the original PowerPC ISA?
If this is the next chip to be featured in the towers then I agree that we're realistically looking at the second quarter of 2003 as the soonest that these things could be ready in quantity if they're having their debutante ball in October.
I harbor huge doubts as to anything fast coming for pros in the foreseeable future. But I'm just being a grump.
i'm pretty sure the answer to my question is in here somewhere but its too much ot read...
Assuming apple adopts this and IBM produces it what is the earliest this will see the light of day on our desktop? february update to the powermac line? or march? or is that too early?
I would like to know because if this is the g5 then i don't wanna buy the last g4 towers to be released this month
<strong>I would like to know because if this is the g5 then i don't wanna buy the last g4 towers to be released this month</strong><hr></blockquote>
First don't expect anyone here to KNOW for sure and say so... AI is filled with some pretty good people but what it comes down to is either people reading your request knows and can't say or they don't know but will give you a best guess and if that's the case it's just that a guess....
Second... don't get too crazy about buying a computer. If you need a faster machine then buy it.... Otherwise wait. It really is that simple. You say you don't wanna buy this next round of computers if new ones are gonna come out Jan/Feb/Mar of next year with a new CPU.... Then when those new systems do ship do you buy? After all this IS the 1st gen of a whole new system and it could very well have 'issues' ... now do you wait again for the next rev of the 'new boxes'?
You see where I'm going with this... you can wait forever doing that.
If you need a new box then buy it if not just wait till you do... Seach the boards (when you are ready) just to make sure a newer box isn't 'right around the corner' (like where we are right now) and then buy.
Trust me... No matter when you buy your system 6 to 9 months later a BETTER and CHEAPER box is sure come out. It's been that way FOREVER.
Concerning Altivec, one sure is thing they have patented some stuffs : on a pdf of may july 2001 file from IBM i found : US patents 6,119,224 C. P. Roth : fast shift amount decode for VMX shift and VPERM instructions.
Perhaps it's something else but it's look like altivec stuff (or is it GEKKO ?)
Comments
<strong>... posted this in another thread already:
From the <a href="http://www.mdronline.com/mpf/conf.html#day1_2"; target="_blank">Microprocessor Forum homepage</a>:
Breaking Through Compute Intensive Barriers - IBM's New 64-bit PowerPC Microprocessor
Peter Sandon, Senior Processor Architect, Power PC Organization, IBM Microelectronics
IBM is disclosing the technical details of a new 64-bit PowerPC microprocessor designed for desktops and entry-level servers. Based on the award winning Power4 design, this processor is an 8-way superscalar design that fully supports Symmetric MultiProcessing. The processor is further enhanced by a vector processing unit implementing over 160 specialized vector instructions and implements a system interface capable of up to 6.4GB/s.
Emphasis added. Altivec comprises 162 instructions - will IBM finally implement it? Are there any other desktop OSs on PowerPC apart from MacOSX? AIX maybe?
Interestingly, there are no anouncements by Motorola on the MPF homepage... . Maybe the G4 will be Moto's last desktop-capable processor for real?</strong><hr></blockquote>
I predict that this new processor will be a birthday present for Mac OS X. While IBM's new plant is up now it won't be fully ramped up until early next year. Even if this chips exists today it would be too expensive for Apple to use in desktops before late March. We might see it in the Xserve a litle sooner. Until then all I expect is speedbumped G4s.
Maddan
<strong>Emulation for AltiVec sounds like a bad idea!</strong><hr></blockquote>
It depends on how IBM decided to do it. Velocity Engine programmers use a macro language to program the unit instead of banging on bare metal, so there's currently "emulation" in the sense that the instruction codes are translated into the AltiVec ISA. Right now, as I understand it, that translation is trivial. 1 macro becomes 1 instruction.
As long as the translation of the Velocity Engine macro language to the IBM ISA isn't especially difficult or cumbersome (e.g., the vector permute function doesn't map to a long series of bit-twiddling ops in the integer units!) it should work fine.
-except for the .pdf with that pic. that was going around noting one MASSIVE heat sink in next weeks supposed new towers. <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
got ta love rumors
"... and it furthermore includes a SIMD-extension offering 160 commands. This is not AltiVec compatible (that is, with its own 128-bit unit [bus?]); instead it addresses the 64-bit CPU registers directly, apparently making it compatible with the extension for Embedded [processors] (Book E) which was planned in cooperation with Motorola. Motorola just recently presented the communication processors MPC8560 and MPC8540, and they also include such a new SIMD extension ....."
"Thus, IBM's stubborn refusal to include an AltiVec unit makes sense, if better-performing SIMD possibilities in a 64-bit unit were in the works, and they didn't want to introduce temporary, non-compatible solutions. However, in the new processors the AltiVec-commands can be emulated in software in the traditional manner."
The words in square brackets [] are my additions, attempting to clarify the text further...
Does anyone know more about the "new SIMD extension" in the two Motorola communications processors? Any comments when comparing it to AltiVec?
engpjp
PS - good snooping there!
<strong>Actually, there are several interesting passages in the article from <a href="http://www.heise.de,"; target="_blank">www.heise.de,</a> and being a Dane I have translated them here:
</strong><hr></blockquote>
this is why i love europe... a dane living in turkey translates a german article about two american companies to english for the rest of the world to understand.
There,s discussion at Ars by BadAndy relevent to 64-bit altivec in the IBM thread.
<strong>There is a big difference between announcing a produce from a marketing standpoint, and presenting technology at Conferences. Formal announcements usually are made outside of Conferences unless the conference also happens to be a major marketing tradeshow that coincides with your desired release date anyway.
I would not read ANYTHING into the Oct 15 date for the presentation other than that is when those PowerPoint slides will be complete.
</strong><hr></blockquote>Just to give more context to this, the 750fx Sahara was first introduced at the microprocessor forum last October, and then found its way into iBooks in May of the next year, about 7 months later. And I'm sure other time frames have varied wildly. I.e., who can tell how far away this thing is?
<strong>"... and it furthermore includes a SIMD-extension offering 160 commands. This is not AltiVec compatible (that is, with its own 128-bit unit [bus?]); instead it addresses the 64-bit CPU registers directly, apparently making it compatible with the extension for Embedded [processors] (Book E) which was planned in cooperation with Motorola...."
</strong><hr></blockquote>
Book E does not specify any SIMD-unit... I've searched through the Book E paper.
And Im pretty sure the SIMD used in Motorola embedded PPC is not a 160+ instruction extension. Maybe I could try to find more info about that.
<a href="http://e-www.motorola.com/brdata/PDFDB/docs/EREF_CH3.pdf"; target="_blank">http://e-www.motorola.com/brdata/PDFDB/docs/EREF_CH3.pdf</a>;
Actually.. its ~186 vector instructions (+- 2).. <img src="graemlins/surprised.gif" border="0" alt="[Surprised]" /> <img src="graemlins/surprised.gif" border="0" alt="[Surprised]" />
Some of the instructions are pretty strange.. Like the one at page 148.
[ 08-09-2002: Message edited by: blabla ]</p>
Its possible IBM has chosen to go this route, but I really hope not... and I don't believe so. First of all there are several explicit references to VMX, and that is AltiVec. Second, this new desktop processor is not embedded and thus probably not Book "E" compliant. Third, emulating the AltiVec unit on top of something using the integer registers simply isn't possible to do efficiently since it would clobber the data used by the integer unit.
I think that site is just blowing smoke, and until there is real evidence to the contrary I'm going to continue to believe that IBM has implemented a VMX unit. It is possible that this might internally involve cracking the VMX instructions and feeding them to multiple execution units, but as long as that is at least as fast it doesn't really matter.
I've also seen comments that the description of the new processor is 8-way superscalar meaning it has 8 execution units... there is another (more common) meaning for "N-way" superscalar, and that is the number of instructions dispatched per clock cycle. The G4 has more than 4 execution units, but is classified as 4-way. Moto's G5 has more than 2 units, but is classified as 2-way. I think this is more likely, and therefore the new IBM processor will dispatch up to 8 instructions per clock to some number of execution units... probably a rather large number of units (i.e. > 8).
All just speculation, of course, but it is more in line with the expected number of transistors than much of the other speculation out there.
I've also seen comments that the description of the new processor is 8-way superscalar meaning it has 8 execution units... there is another (more common) meaning for "N-way" superscalar, and that is the number of instructions dispatched per clock cycle.</strong>
The meaning of superscalar has always been the number of instructions dispatched per clock cycle. This other way is more symptomatic of market-droid naming conventions or common misconceptions then anything else.
8-way superscalar though, shazam! That better be one efficient compiler!
a) There will be a a proper Altivec/VMX VPU on board (Bad Andy suggests that a 64bit split/emulation/fudge would not hack it)
b) The '64bit' chip being presented in October is NOT the chip that Apple will use; there will be 32 bit variant embargoed until Apple announce (six-seven months?) and OSX will migrate to 64 bit in due course.
This all leaves Apple with a bit of a medium term PR headache and I suspect the 'iPower5' (whatever) will be going into a higher tier box ($5-6K, 2U rackmount?) for the 3D render, recording studio, film editing, too much money crowd (like me, yummm). The G4 will continue for at least another 18 months.
<strong>Its been a long time since there's been so much exitement on these boards. My personal take, reading the the runes is that ;
a) There will be a a proper Altivec/VMX VPU on board (Bad Andy suggests that a 64bit split/emulation/fudge would not hack it)
b) The '64bit' chip being presented in October is NOT the chip that Apple will use; there will be 32 bit variant embargoed until Apple announce (six-seven months?) and OSX will migrate to 64 bit in due course.
This all leaves Apple with a bit of a medium term PR headache and I suspect the 'iPower5' (whatever) will be going into a higher tier box ($5-6K, 2U rackmount?) for the 3D render, recording studio, film editing, too much money crowd (like me, yummm). The G4 will continue for at least another 18 months.</strong><hr></blockquote>
I don't think they'd waste their effort building a 32-bit version of it. More likely Apple wouldn't tell anyone it was a 64-bit CPU until 10.3 ships and suddenly flips the "64-bit mode" bit for any application that wants to be 64-bit. Oh look, 64-bit code.
Or they've had MacOSX running on POWER4s and PPC620s for the last 3 years and the 64-bit support is already there (perhaps Cocoa only?).
<strong>
I don't think they'd waste their effort building a 32-bit version of it. More likely Apple wouldn't tell anyone it was a 64-bit CPU until 10.3 ships and suddenly flips the "64-bit mode" bit for any application that wants to be 64-bit. Oh look, 64-bit code.
Or they've had MacOSX running on POWER4s and PPC620s for the last 3 years and the 64-bit support is already there (perhaps Cocoa only?).
64 bit + Jaguar = No booting into OS 9? Could that be the reason?
Im pretty sure it will be backwards compatible with 32bit apps, wasnt that a design element in the original PowerPC ISA?
I harbor huge doubts as to anything fast coming for pros in the foreseeable future. But I'm just being a grump.
D
<strong>
I harbor huge doubts as to anything fast coming for pros in the foreseeable future. But I'm just being a grump.
D</strong><hr></blockquote>
You've been hurt before, haven't you? Haven't we all?
Assuming apple adopts this and IBM produces it what is the earliest this will see the light of day on our desktop? february update to the powermac line? or march? or is that too early?
I would like to know because if this is the g5 then i don't wanna buy the last g4 towers to be released this month
<strong>I would like to know because if this is the g5 then i don't wanna buy the last g4 towers to be released this month</strong><hr></blockquote>
First don't expect anyone here to KNOW for sure and say so... AI is filled with some pretty good people but what it comes down to is either people reading your request knows and can't say or they don't know but will give you a best guess and if that's the case it's just that a guess....
Second... don't get too crazy about buying a computer. If you need a faster machine then buy it.... Otherwise wait. It really is that simple. You say you don't wanna buy this next round of computers if new ones are gonna come out Jan/Feb/Mar of next year with a new CPU.... Then when those new systems do ship do you buy? After all this IS the 1st gen of a whole new system and it could very well have 'issues' ... now do you wait again for the next rev of the 'new boxes'?
You see where I'm going with this... you can wait forever doing that.
If you need a new box then buy it if not just wait till you do... Seach the boards (when you are ready) just to make sure a newer box isn't 'right around the corner' (like where we are right now) and then buy.
Trust me... No matter when you buy your system 6 to 9 months later a BETTER and CHEAPER box is sure come out. It's been that way FOREVER.
Dave
Perhaps it's something else but it's look like altivec stuff (or is it GEKKO ?)
[ 08-10-2002: Message edited by: Powerdoc ]</p>