Will Apple's G5 come from IBM?

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  • Reply 161 of 1257
    powerdocpowerdoc Posts: 8,123member
    [quote]Originally posted by Appleworm:

    <strong>I've just take a couple of minutes on motorola website about PowerPC ISA.



    Looking at the roadmap you can see G5 is 85xx rapidIO, extensible architecture...



    There are 2 85xx processors :

    8540 (one year old)

    8560 (PowerQUICC III not for us)



    First intersting point the MIPS are the same with the 7455 : 2315@1GHz (8540) vs 2310@1GHz (7455)



    The 8540 is based on Book E, has RapidIO DDR memory controller @ 333MHz, it's .13 CMOS no SOI, SIMD,... All the technologies are ther





    Will new mac with the 8540 (or a derivative of it) and new MB be faster than the 7455 G4 PM ?



    So, does this 8540 processor sound like the "G5" we will in the next weeks ?





    <a href="http://e-www.motorola.com/webapp/sps/site/overview.jsp?nodeId=03M943030450467M983989030230"; target="_blank">roadmap</a>

    <a href="http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MPC8560&nodeId=03M9430304504 67M98657" target="_blank">8560 PwQUICC III</a>

    <a href="http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MPC8540&nodeId=03M9430304504 67M98657" target="_blank">8540</a>



    Aw </strong><hr></blockquote>

    There will not be any 8450 chips in a mac, as you stated a DDR memory controlled 7455 will be faster at equal mhz than a 8450. The G5 is strictly an embedded chips, not suited for desktop computers. The G4 was already an embedded chips, but at his time worthing to be included in a powermac.



    The future of Mac is the new chip from IBM, precisions will be revealed in october during the microprocessor forum.
  • Reply 162 of 1257
    FYI



    <a href="http://www.heise.de/newsticker/data/as-09.08.02-000/"; target="_blank">http://www.heise.de/newsticker/data/as-09.08.02-000/</a>;



    This article claims the SIMD Unit is _NOT_ altivec compatible!



    End of Line
  • Reply 163 of 1257
    screedscreed Posts: 1,077member
    From the news.com article:

    [quote]Big Blue plans to design the new desktop PowerPC chip using technology from its Power4 processor for servers.<hr></blockquote>

    [quote]The chip's heritage--the Power4 design--suggests that it will be a high-performance processor. Though it's unclear what clock speed the new PowerPC will offer, IBM has been gunning for 2GHz. The company said last year that it intended to hit that speed target by the end of 2002.<hr></blockquote>



    Does not sound like it's ready to go.



    OR



    1.4 - 1.5 are ready now and 2.0 for Q1



    Screed ...Thank God I'm broke!



    [ 08-09-2002: Message edited by: sCreeD ]</p>
  • Reply 164 of 1257
    daveleedavelee Posts: 245member
    Perhaps but...



    [quote] The new chip, which Big Blue will unveil at this fall's Microprocessor Forum, is designed to deliver higher clock speeds and 64-bit processing to desktop computers and also to entry-level servers. <hr></blockquote>



    [quote] "It's a really hefty processor in terms of performance," said Kevin Krewell <hr></blockquote>



    Gives the impression it is pretty much done from the way it is written (but I agree that 2.0 GHz is not likely to happen).
  • Reply 165 of 1257
    stoostoo Posts: 1,490member
    Remember that this CPU has i) a process shrink, ii) a different design from G4 (inc. a deeper pipeline ), so 2GHz may be possible.



    [ 08-09-2002: Message edited by: Stoo ]</p>
  • Reply 166 of 1257
    daveleedavelee Posts: 245member
    That would be nice.



    '2GHz IBM Power4l-PC'







    [ 08-09-2002: Message edited by: DaveLee ]</p>
  • Reply 167 of 1257
    programmerprogrammer Posts: 3,467member
    [quote]Originally posted by DaveLee:

    <strong>Perhaps but...



    Gives the impression it is pretty much done from the way it is written (but I agree that 2.0 GHz is not likely to happen).</strong><hr></blockquote>



    Well they are probably taped out, or at least getting close if they are going to ship in quantity next year.
  • Reply 168 of 1257
    posted from Tron



    <a href="http://www.heise.de/newsticker/data/as-09.08.02-000/"; target="_blank">http://www.heise.de/newsticker/data/as-09.08.02-000/</a>;



    This article claims the SIMD Unit is _NOT_ altivec compatible!



    but if you read it, stay that the only one that have something to say is Apple.



    from the articule:



    AltiVec-Befehle können die neuen Prozessoren aber per Software in althergebrachter Weise emulieren



    translation:



    AltiVec-Commands can emulate the new processors however by software in traditional way



    and:



    Doch von IBM-Desktops mit PowerPC ist derzeit weit und breit nichts zu sehen. Hier kommt wohl dem Dritten im Bunde des ehemaligen PowerPC-Triumvirats, Apple, eine wesentliche Rolle zu



    In English:



    But of IBM Desktops with power PC at present far and broadly nothing is to be seen. Here a substantial role probably comes third in the federation of the former PowerPC Triumvirats, Apple



    ciao
  • Reply 169 of 1257
    blackcatblackcat Posts: 697member
    [quote]Originally posted by InstanGlueck:

    <strong>



    But of IBM Desktops with power PC at present far and broadly nothing is to be seen. Here a substantial role probably comes third in the federation of the former PowerPC Triumvirats, Apple



    ciao</strong><hr></blockquote>



    Well I'm glad we've cleared that up!
  • Reply 170 of 1257
    bodhibodhi Posts: 1,424member
    When Apple wanted to move to a new chip from the G3 they went to BOTH IBM and Mot. IBM demoed a G3 at around 600MHz I believe and gave Apple the roadmap for the G3 which may or may not have included MP support and L3 cache support. Mot demoed what we know is the G4, basically a G3 with a slightly better bus system and most importantly...AltiVec. BUT at the time Mot only had it running at a top speed of 400MHz. IBM's arguement was that their ability to hit higher clock speeds would compensate for the lack of AltiVec. Apple went with AltiVec and then we had the 500MHz debacle.



    Now I am sure that IBM looks at the eMac/iMac/Powerbook/Power Mac/Xserve and soon to be iBook and sees a lot of chip business it couldf steal from Mot.



    [ 08-09-2002: Message edited by: Bodhi ]</p>
  • Reply 171 of 1257
    gamblorgamblor Posts: 446member
    [quote] This article claims the SIMD Unit is _NOT_ altivec compatible! <hr></blockquote>



    Weellllll... Here's the relevant bit from the article, translated courtesy Google:



    [quote] This is not AltiVec compatible (with an own 128-bittigen unit), but works directly with the 64-bittigen CPU registers, probably compatibly to the extension for Embedded (Book E), agreed upon with Motorola. <hr></blockquote>



    It seems that they believe IBM's SIMD won't be compatable with Altivec because it uses existing registers, which isn't the case. It's possible IBM 's SIMD instructions are equivelent to Altivec instructions, just using the existing scalar registers instead of a dedicated register set.



    Let's think about this. We know IBM had a hand in developing VMX (?), which is either Altivec, or Altivec is based on (Programmer-- help please!). It stands to reason that IBM would use VMX, which they helped create, as their own SIMD implementation.



    Besides, there are many benefits to IBM implementing an Altivec-compatible SIMD instuction set. Programmers don't have to learn a new instruction set with its own optimization requirements. Programs written with Altivec code will run on their new processor, hopefully with little or no modification. Basically, IBM gets access to code, compilers, and programmers who are already familiar with using the instruction set if they go with SIMD instructions that are Altivec compatible.
  • Reply 172 of 1257
    powerdocpowerdoc Posts: 8,123member
    I am not a technical geek, but i do not see how a normal integer or FP unit can make SIMD operation : one operation on multiple data : 4 * 32 8 * 16 or 16 * 8.

    The integer unit or the FP unit of both power4 core or book e core are not able to make Single Instruction Multiple Data, they make Single Insturction Unique Data.



    I think that The WMX will be a different design than the Altivec unit of mot, just like the mmx or SSE unit of AMD is different from the one of INTEL, but both are compatible.
  • Reply 173 of 1257
    If this chip is supposed to be announced at the microprocessor forum in october would they release the chip in powermacs, before its officially announced? I doubt it.



    Proably going to get at least 1 more round of g4's before we get this
  • Reply 174 of 1257
    rickagrickag Posts: 1,626member
    [quote]Originally posted by Powerdoc:

    <strong>I am not a technical geek, but i do not see how a normal integer or FP unit can make SIMD operation : one operation on multiple data : 4 * 32 8 * 16 or 16 * 8.

    The integer unit or the FP unit of both power4 core or book e core are not able to make Single Instruction Multiple Data, they make Single Insturction Unique Data.



    I think that The WMX will be a different design than the Altivec unit of mot, just like the mmx or SSE unit of AMD is different from the one of INTEL, but both are compatible.</strong><hr></blockquote>



    Think two FPU's
  • Reply 175 of 1257
    zazzaz Posts: 177member
    And this in from



    <a href="http://www.silicon.com/public/door?6004REQEVENT=&REQINT1=55033&REQSTR1=silicon.c om" target="_blank">silicon.com</a>



    This thread is making me all warm and fuzzy...
  • Reply 176 of 1257
    blablablabla Posts: 185member
    Sill question but..



    Will this new CPU be dual-core or only single-core? :confused:



    As I understand this, a cpu contains 2 cores, and 4 & 4 CPUs are placed into 1 package?
  • Reply 177 of 1257
    cthulucthulu Posts: 20member
    "This is not AltiVec compatible (with an own 128-bittigen unit), but works directly with the 64-bittigen CPU registers, probably compatibly to the extension for Embedded (Book E), agreed upon with Motorola."



    Ok,how do they know this is not "altivec" when nothing has been published about this chip...not even its name?
  • Reply 178 of 1257
    blablablabla Posts: 185member
    [quote]Originally posted by cthulu:

    <strong>

    Ok,how do they know this is not "altivec" when nothing has been published about this chip...not even its name?</strong><hr></blockquote>



    Because, suddenly they all got sources.. <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
  • Reply 179 of 1257
    airslufairsluf Posts: 1,861member
  • Reply 180 of 1257
    [quote]Originally posted by InstanGlueck:

    <strong>posted from Tron



    <a href="http://www.heise.de/newsticker/data/as-09.08.02-000/"; target="_blank">http://www.heise.de/newsticker/data/as-09.08.02-000/</a>;



    This article claims the SIMD Unit is _NOT_ altivec compatible!



    but if you read it, stay that the only one that have something to say is Apple.



    from the articule:



    AltiVec-Befehle können die neuen Prozessoren aber per Software in althergebrachter Weise emulieren



    translation:



    AltiVec-Commands can emulate the new processors however by software in traditional way

    </strong><hr></blockquote>



    Emulation for AltiVec sounds like a bad idea!



    [quote]<strong>



    and:



    Doch von IBM-Desktops mit PowerPC ist derzeit weit und breit nichts zu sehen. Hier kommt wohl dem Dritten im Bunde des ehemaligen PowerPC-Triumvirats, Apple, eine wesentliche Rolle zu



    In English:



    But of IBM Desktops with power PC at present far and broadly nothing is to be seen. Here a substantial role probably comes third in the federation of the former PowerPC Triumvirats, Apple



    ciao</strong><hr></blockquote>



    Danke fuer die Uebersetzung aber ich denke mein Deutsch reicht aus, um zu erkennen dass es sich hier nur um Spekulation seitens Heise handelt.



    In English:



    Thx for the translation but I think my German is sufficient enough, to realize that this is only speculation from heise.







    End of Line



    PS: Gruesse aus Wien!
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