also someone dropped a hint "producer"? (which i do not know if it was based on fact or not) saying the lowend 970 would use the nforce video-subsystem.
...and why can't 10.2.7 just be an update to 10.2.6 if Panther isn't due 'til September? 10.2.6 still has problems.
So does 10.1.5
I just threw my two cents in on the WWDC topic regarding this issue. Basically, the Smeagol -> Panther thing is the only way Apple could start seeding 64-bit OS's effectively.
Where did you get this bit about NUMA? NUMA is a performance hit on any system where it's not strictly necessary, there's no real reason to make the 970 systems NUMA at all. Apple has to design a new memory controller for the 970, and either they did so in a brain-damaged fashion tha requires two memory controllers (which I find incredibly hard to believe) or it's a straight and normal memory architecture.
There's no significant difference between dual and single 970 systems from the perspective of memory architecture unless Apple is doing something incredibly stupid (or supporting dual processor systems using an architecture designed for 64-processor systems!).
I am not sure for NUMA, even if Amorh (which in him, i have the deepest faith : thanks in advance for the cookie ) thinks it will arrive.
However Hypertransport is on the way, and i am not sure that HT can work without a NUMA architecture, because HT is supposed to linked two chips altogether.
I will add, that if they choose this complicated architecture, it would be also a good reason to explain why the dual mobo are not ready.
Wouldnt make sense, unless we are seeing another "Yikez".. And most people learnt NOT to do this again.. Especially since people now know that PPC 970 is comming and that the hardware needs a major overhaul.
Wouldnt make sense, unless we are seeing another "Yikez".. And most people learnt NOT to do this again.. Especially since people now know that PPC 970 is comming and that the hardware needs a major overhaul.
It's very different from Yikes, the single ppc 970 mobo, will be a brand new architecture with a new bus, and not a G4 on a G3 mobo like the Yikes.
The only limitation will be Smeagol, but i think that the buyers of this machine will have a free upgrade for panther.
There is absolutely no way to put a PPC 970 on a G4 mobo, the bus is not the same. If the G4 fitted with Yikes, it's because he supported two bus : the MPX and the old one of the G3. The ppc 970 support only one type of bus. That's why there is very slight chance to see upgrade cards based upon this chip. Or if they arrive they will communicate via an intermediate memory controller who will communicate with the old mobo via the MPX bus. This indirect bus connection will reduce dramitacally all performances.
Apple must be happy of this, if people wants to enjoy the new chip, they will have to buy a new mac.
However Hypertransport is on the way, and i am not sure that HT can work without a NUMA architecture, because HT is supposed to linked two chips altogether.
HyperTransport is for more than just linking two processors together...
It's very different from Yikes, the single ppc 970 mobo, will be a brand new architecture with a new bus, and not a G4 on a G3 mobo like the Yikes.
Therefore the quotes. What I meant was that they release a single processor 970 with 'less' supreme hardware in it, like maybe AGP 4x instead of 8x for example. Doing this would allow Apple to make even better machines when they release the dual models, and therefore look better for people buying new machines.
Therefore the quotes. What I meant was that they release a single processor 970 with 'less' supreme hardware in it, like maybe AGP 4x instead of 8x for example. Doing this would allow Apple to make even better machines when they release the dual models, and therefore look better for people buying new machines.
I don't think there is any real reason to cut back on the lower level machines overall system, unless it has a substantial impact on cost. (Like the L3cache did). You may see variances in things like graphics cards, drives and amounts of RAM, but other then that, the duals will sell themselves. The extra processor is THE reason for buying one. Except for necessary differences I suspect the single and duals will run pretty much on identical system hardware. The limiting factor is not Apple's desire but more likely availability.
(Dang, and I was really wanting that dual 1.8 on my birthday, the day after. )
I don't think there is any real reason to cut back on the lower level machines overall system, unless it has a substantial impact on cost. (Like the L3cache did). You may see variances in things like graphics cards, drives and amounts of RAM, but other then that, the duals will sell themselves. The extra processor is THE reason for buying one. Except for necessary differences I suspect the single and duals will run pretty much on identical system hardware. The limiting factor is not Apple's desire but more likely availability.
HyperTransport is for more than just linking two processors together...
You really WANT me to get a stroke from your posts, don't you moki?
Anyway, I seriously doubt we will see a two-teir architecture from Apple.
With Yikes!, Apple took the G3 architecture and slapped a G4 in that. Apple could do that because the G4 runs natively using a G3 bus.
However, to develop a 2T architecture with the 970, Apple would need to develop two distinct chipsets. It would probably be cheaper for Apple to develop one expensive chipset and have it as standard across the line, than to spend all the money developing two chipsets.
You really WANT me to get a stroke from your posts, don't you moki?
Anyway, I seriously doubt we will see a two-teir architecture from Apple.
With Yikes!, Apple took the G3 architecture and slapped a G4 in that. Apple could do that because the G4 runs natively using a G3 bus.
However, to develop a 2T architecture with the 970, Apple would need to develop two distinct chipsets. It would probably be cheaper for Apple to develop one expensive chipset and have it as standard across the line, than to spend all the money developing two chipsets.
Barto
Why would they need to produce 2 distinct chipsets?
You design one chipset that does everything you need. In this instance that would have 2 seperate ApplePI busses to connect to 2 970 and hook up to the (hopefully) DDR400 dual bank RAM system and to the rest of the system.
So, on a dual processor system you use the full memory controller (companion chip whatever) with one chip providing the memory requirements for two processors. No NUMA or anything stupid like that (and it IS stupid in a dual processor design), minimal changes to the current system we all tolerate.
On a single processor system only one of the two processors is hooked up, so the memory controller is only using a subset of its capabilities.
The advantage of using this approach is scale: only supporting one chipset. The disadvantage is a more complex chip set to design initially, but you get to amortise the design costs over more chips because of scale. Each individual chip is more expensive to produce, but it is a tiny fraction of the cost of supporting two designs.
HyperTransport is for more than just linking two processors together...
Interesting phrasing of that statement, Moki. Tell me, did you carefully choose this phrasing (implying that they would use it for processor linking and more), or was it carelessness and what you really meant was that HyperTransport is used for other things than connecting processors?
Possible things to wire together with HyperTransport: memory controllers, processors, I/O chips, GPUs.
I just read a white paper on HT. It is more flexible than I remember and can support fairly long connections (> 0.5 meters) which can be across connectors and cables. ATI and nVidia are both on the consortium. This is purely speculation, but I would love to see Apple define an video card standard that uses HT as the connection. 12.8 GB/sec of Quartz Extreme goodness. That would certainly make people working in the 3D graphics industry sit up and take notice.
Why would they need to produce 2 distinct chipsets?
For an architectually different low-end and high-end Power Mac, you would need 2 distinct chipsets. This is what some people here are proposing. This is not a good idea, as it would probably be cheaper just to have a single-teir architecture.
This has NOTHING to do with dual/single processors.
Remember, the Power Mac G5 will use a different architecture from northbridge/southbridge. This is not a shared bus "every device is the same" as MPX.
This is a unidirectional point to point bus which requires a companion chip for each 970
It would make the most sense for Apple to include a northbridge with seperate companion chips which are connected to the northbridge with HyperTransport. Dual and quad CPUs, maybe even more, would be feisable with this design.
In terms of a HyperTransport graphics card, who cares about industry standards when you have 12.8GB/s???
For an architectually different low-end and high-end Power Mac, you would need 2 distinct chipsets. This is what some people here are proposing. This is not a good idea, as it would probably be cheaper just to have a single-teir architecture.
This has NOTHING to do with dual/single processors.
Remember, the Power Mac G5 will use a different architecture from northbridge/southbridge. This is not a shared bus "every device is the same" as MPX.
This is a unidirectional point to point bus which requires a companion chip for each 970
So what? A uni-directional bus makes no difference. At all. In any way.
The companion chip is not some magical entity where the 970 will not work without it. The 970 is a CPU. It executes instructions. It executes instructions on data.
The 970 relies on another chip to: read an address from the processor, get the memory at that address and supply it to the processor. That is a memory controller. You do not need:
970 <=> Companion Chip <=> North bridge
Because a north bridge chip is essentially a memory controller, and is really a PC Centric term. You would have this:
RAM
||
970 <=> Memory Controller
^
||
System Controller
(if these don't come out right, everything hooks into the Memory Controller)
If you want dual 970's
RAM
||
970 <=> Memory Controller <=> 970
^
||
System Controller
Now in both instanes the memory controller chip can be the same, if there isn't a second 970 chip then that part of the memory controller is inactive. The <=> represents an Apple PI interface, so there are two seperate interfaces to the memory controller. Each 970 in the system thinks it is the only one there and happily goes about doing its thing: Executing Instructions. All you need are different daughter cards.
Now there is also another instance where you could easily use the same memory controller to create a higher end machine with better performance:
RAM RAM
|| ||
970 <=> Memory Controller <=> 970
^
||
System Controller
Now here is the same memory controller supporting dual banks of RAM. The chip detects how many banks of RAM are hooked up and only uses what it has access to. And this can also be supported just on the daughter card (becuase that is where I think the RAM will be located).
Quote:
It would make the most sense for Apple to include a northbridge with seperate companion chips which are connected to the northbridge with HyperTransport. Dual and quad CPUs, maybe even more, would be feisable with this design.
In terms of a HyperTransport graphics card, who cares about industry standards when you have 12.8GB/s???
Barto
Well, it is much harder to get people to build for you if you don't support IS interfaces. Replacing AGP with a much higher bandwidth solution would be nifty.
I just read a white paper on HT. It is more flexible than I remember ...
I've been going nuts with this for nearly a year now! Both RIO an HT have so much upside and are such a departure from 'normal'.... Crazy schematics of all sorts scream to be drawn!
The serious questions seem to come down to: Is it possible that Darwin/Mac OS X will support 'non-standard'/NUMA architectures RSN? This seems like more work than making it run on 64-bit hardware.
But if Smeagol's precious is 'One ring to bind them all'... and 'ring' refers to a NUMA architecture -> BWAHAHAHAAAA.
Sure you could integrate the peice of silicon which handles the physical and link layers of the 970's bus (the companion chip) into the northbridge. But wouldn't it make more sense to have a HT connection between multiple CCs and the NB to broaden Apple's SMP horizon?
Also, the northbridge is NOT the memory controller, he who speaks of matters beyond his knowledge.
Comments
would this lend it credence?
Originally posted by Bigc
...and why can't 10.2.7 just be an update to 10.2.6 if Panther isn't due 'til September? 10.2.6 still has problems.
So does 10.1.5
I just threw my two cents in on the WWDC topic regarding this issue. Basically, the Smeagol -> Panther thing is the only way Apple could start seeding 64-bit OS's effectively.
Originally posted by Anonymous Karma
Where did you get this bit about NUMA? NUMA is a performance hit on any system where it's not strictly necessary, there's no real reason to make the 970 systems NUMA at all. Apple has to design a new memory controller for the 970, and either they did so in a brain-damaged fashion tha requires two memory controllers (which I find incredibly hard to believe) or it's a straight and normal memory architecture.
There's no significant difference between dual and single 970 systems from the perspective of memory architecture unless Apple is doing something incredibly stupid (or supporting dual processor systems using an architecture designed for 64-processor systems!).
I am not sure for NUMA, even if Amorh (which in him, i have the deepest faith : thanks in advance for the cookie
However Hypertransport is on the way, and i am not sure that HT can work without a NUMA architecture, because HT is supposed to linked two chips altogether.
I will add, that if they choose this complicated architecture, it would be also a good reason to explain why the dual mobo are not ready.
Originally posted by Leonis
Single CPU PM comes out first running Smeagol
then....later in September
Dual CPUs PM come but only running 10.3
Wouldnt make sense, unless we are seeing another "Yikez".. And most people learnt NOT to do this again.. Especially since people now know that PPC 970 is comming and that the hardware needs a major overhaul.
Originally posted by T'hain Esh Kelch
Wouldnt make sense, unless we are seeing another "Yikez".. And most people learnt NOT to do this again.. Especially since people now know that PPC 970 is comming and that the hardware needs a major overhaul.
It's very different from Yikes, the single ppc 970 mobo, will be a brand new architecture with a new bus, and not a G4 on a G3 mobo like the Yikes.
The only limitation will be Smeagol, but i think that the buyers of this machine will have a free upgrade for panther.
There is absolutely no way to put a PPC 970 on a G4 mobo, the bus is not the same. If the G4 fitted with Yikes, it's because he supported two bus : the MPX and the old one of the G3. The ppc 970 support only one type of bus. That's why there is very slight chance to see upgrade cards based upon this chip. Or if they arrive they will communicate via an intermediate memory controller who will communicate with the old mobo via the MPX bus. This indirect bus connection will reduce dramitacally all performances.
Apple must be happy of this, if people wants to enjoy the new chip, they will have to buy a new mac.
Originally posted by Powerdoc
However Hypertransport is on the way, and i am not sure that HT can work without a NUMA architecture, because HT is supposed to linked two chips altogether.
HyperTransport is for more than just linking two processors together...
Originally posted by moki
HyperTransport is for more than just linking two processors together...
I thought I read somewhere that one of the things it could do is connect the graphics card in some way to the system.
Originally posted by sc_markt
I thought I read somewhere that one of the things it could do is connect the graphics card in some way to the system.
Right - it does this on the nForce (lower-end model with built in graphics).
HyperTransport is just a point-to-point bus protocol. They could only be using it to link the south bridge and ATA controller for all we know.
Originally posted by Powerdoc
It's very different from Yikes, the single ppc 970 mobo, will be a brand new architecture with a new bus, and not a G4 on a G3 mobo like the Yikes.
Therefore the quotes. What I meant was that they release a single processor 970 with 'less' supreme hardware in it, like maybe AGP 4x instead of 8x for example. Doing this would allow Apple to make even better machines when they release the dual models, and therefore look better for people buying new machines.
Originally posted by T'hain Esh Kelch
Therefore the quotes. What I meant was that they release a single processor 970 with 'less' supreme hardware in it, like maybe AGP 4x instead of 8x for example. Doing this would allow Apple to make even better machines when they release the dual models, and therefore look better for people buying new machines.
I don't think there is any real reason to cut back on the lower level machines overall system, unless it has a substantial impact on cost. (Like the L3cache did). You may see variances in things like graphics cards, drives and amounts of RAM, but other then that, the duals will sell themselves. The extra processor is THE reason for buying one. Except for necessary differences I suspect the single and duals will run pretty much on identical system hardware. The limiting factor is not Apple's desire but more likely availability.
(Dang, and I was really wanting that dual 1.8 on my birthday, the day after.
Originally posted by Shaktai
I don't think there is any real reason to cut back on the lower level machines overall system, unless it has a substantial impact on cost. (Like the L3cache did). You may see variances in things like graphics cards, drives and amounts of RAM, but other then that, the duals will sell themselves. The extra processor is THE reason for buying one. Except for necessary differences I suspect the single and duals will run pretty much on identical system hardware. The limiting factor is not Apple's desire but more likely availability.
Well.. They did release the Yikez, didnt they?
Originally posted by moki
HyperTransport is for more than just linking two processors together...
You really WANT me to get a stroke from your posts, don't you moki?
Anyway, I seriously doubt we will see a two-teir architecture from Apple.
With Yikes!, Apple took the G3 architecture and slapped a G4 in that. Apple could do that because the G4 runs natively using a G3 bus.
However, to develop a 2T architecture with the 970, Apple would need to develop two distinct chipsets. It would probably be cheaper for Apple to develop one expensive chipset and have it as standard across the line, than to spend all the money developing two chipsets.
Barto
Originally posted by Barto
You really WANT me to get a stroke from your posts, don't you moki?
Anyway, I seriously doubt we will see a two-teir architecture from Apple.
With Yikes!, Apple took the G3 architecture and slapped a G4 in that. Apple could do that because the G4 runs natively using a G3 bus.
However, to develop a 2T architecture with the 970, Apple would need to develop two distinct chipsets. It would probably be cheaper for Apple to develop one expensive chipset and have it as standard across the line, than to spend all the money developing two chipsets.
Barto
Why would they need to produce 2 distinct chipsets?
You design one chipset that does everything you need. In this instance that would have 2 seperate ApplePI busses to connect to 2 970 and hook up to the (hopefully) DDR400 dual bank RAM system and to the rest of the system.
So, on a dual processor system you use the full memory controller (companion chip whatever) with one chip providing the memory requirements for two processors. No NUMA or anything stupid like that (and it IS stupid in a dual processor design), minimal changes to the current system we all tolerate.
On a single processor system only one of the two processors is hooked up, so the memory controller is only using a subset of its capabilities.
The advantage of using this approach is scale: only supporting one chipset. The disadvantage is a more complex chip set to design initially, but you get to amortise the design costs over more chips because of scale. Each individual chip is more expensive to produce, but it is a tiny fraction of the cost of supporting two designs.
Originally posted by moki
HyperTransport is for more than just linking two processors together...
Interesting phrasing of that statement, Moki. Tell me, did you carefully choose this phrasing (implying that they would use it for processor linking and more), or was it carelessness and what you really meant was that HyperTransport is used for other things than connecting processors?
Possible things to wire together with HyperTransport: memory controllers, processors, I/O chips, GPUs.
I just read a white paper on HT. It is more flexible than I remember and can support fairly long connections (> 0.5 meters) which can be across connectors and cables. ATI and nVidia are both on the consortium. This is purely speculation, but I would love to see Apple define an video card standard that uses HT as the connection. 12.8 GB/sec of Quartz Extreme goodness. That would certainly make people working in the 3D graphics industry sit up and take notice.
Originally posted by JRG
Why would they need to produce 2 distinct chipsets?
For an architectually different low-end and high-end Power Mac, you would need 2 distinct chipsets. This is what some people here are proposing. This is not a good idea, as it would probably be cheaper just to have a single-teir architecture.
This has NOTHING to do with dual/single processors.
Remember, the Power Mac G5 will use a different architecture from northbridge/southbridge. This is not a shared bus "every device is the same" as MPX.
This is a unidirectional point to point bus which requires a companion chip for each 970
It would make the most sense for Apple to include a northbridge with seperate companion chips which are connected to the northbridge with HyperTransport. Dual and quad CPUs, maybe even more, would be feisable with this design.
In terms of a HyperTransport graphics card, who cares about industry standards when you have 12.8GB/s???
Barto
Originally posted by Barto
For an architectually different low-end and high-end Power Mac, you would need 2 distinct chipsets. This is what some people here are proposing. This is not a good idea, as it would probably be cheaper just to have a single-teir architecture.
This has NOTHING to do with dual/single processors.
Remember, the Power Mac G5 will use a different architecture from northbridge/southbridge. This is not a shared bus "every device is the same" as MPX.
This is a unidirectional point to point bus which requires a companion chip for each 970
So what? A uni-directional bus makes no difference. At all. In any way.
The companion chip is not some magical entity where the 970 will not work without it. The 970 is a CPU. It executes instructions. It executes instructions on data.
The 970 relies on another chip to: read an address from the processor, get the memory at that address and supply it to the processor. That is a memory controller. You do not need:
970 <=> Companion Chip <=> North bridge
Because a north bridge chip is essentially a memory controller, and is really a PC Centric term. You would have this:
RAM
||
970 <=> Memory Controller
^
||
System Controller
(if these don't come out right, everything hooks into the Memory Controller)
If you want dual 970's
RAM
||
970 <=> Memory Controller <=> 970
^
||
System Controller
Now in both instanes the memory controller chip can be the same, if there isn't a second 970 chip then that part of the memory controller is inactive. The <=> represents an Apple PI interface, so there are two seperate interfaces to the memory controller. Each 970 in the system thinks it is the only one there and happily goes about doing its thing: Executing Instructions. All you need are different daughter cards.
Now there is also another instance where you could easily use the same memory controller to create a higher end machine with better performance:
RAM RAM
|| ||
970 <=> Memory Controller <=> 970
^
||
System Controller
Now here is the same memory controller supporting dual banks of RAM. The chip detects how many banks of RAM are hooked up and only uses what it has access to. And this can also be supported just on the daughter card (becuase that is where I think the RAM will be located).
It would make the most sense for Apple to include a northbridge with seperate companion chips which are connected to the northbridge with HyperTransport. Dual and quad CPUs, maybe even more, would be feisable with this design.
In terms of a HyperTransport graphics card, who cares about industry standards when you have 12.8GB/s???
Barto
Well, it is much harder to get people to build for you if you don't support IS interfaces. Replacing AGP with a much higher bandwidth solution would be nifty.
Originally posted by Programmer
I just read a white paper on HT. It is more flexible than I remember ...
I've been going nuts with this for nearly a year now! Both RIO an HT have so much upside and are such a departure from 'normal'.... Crazy schematics of all sorts scream to be drawn!
The serious questions seem to come down to: Is it possible that Darwin/Mac OS X will support 'non-standard'/NUMA architectures RSN? This seems like more work than making it run on 64-bit hardware.
But if Smeagol's precious is 'One ring to bind them all'... and 'ring' refers to a NUMA architecture -> BWAHAHAHAAAA.
Shake this.
Also, the northbridge is NOT the memory controller, he who speaks of matters beyond his knowledge.
Barto