What does that mean? We have working designs. Getting someone to fab them decently is the big problem. This is why Apple needs to buy out the PowerPC assets and have AMD fab them. AMD would do a tremendous amount of work to accomodate an Apple chip since their processors have RISC backends with ISA instructions bolted onto the front. It would be a great deal for both. For some reason though, Steve is quite skittish about shacking up with AMD.[/QB][/QUOTE]
Right, and also very important fact, that the old friend of Steve the ex general of Moto semiconductor division Mr. HECTOR DE RUIZ will soon take place as a CEO at AMD.
Moto should forget all customers and cca. 70 million of sold CPU per year, get rid of PPC architecture and forget the future.
Maybe Apple is thinking about making a CPU swap. I mean, why are they keeping an x86 build of OSX fresh? Might OSX on a Hammer/Opteron be worth looking into? Thoughts?
Anyone else notice that the new P4 has a 533Mhz bus, 1066Mhz RDRAM, and is expected to scale to 3Ghz in the 4th quarter.... Why fight this fight when AMD and Intel are clearly winning with no hope in sight from Motorola? Even if we get an upgraded G4/G5 at MWNY, maybe we will see a 400mhz bus.. still one revision behind Intel. Give us parity with Intel on this front and Apple's job of expanding marketshare will be that much easier. Flame away.
<strong>Anyone else notice that the new P4 has a 533Mhz bus, 1066Mhz RDRAM, and is expected to scale to 3Ghz in the 4th quarter.... Why fight this fight when AMD and Intel are clearly winning with no hope in sight from Motorola? Even if we get an upgraded G4/G5 at MWNY, maybe we will see a 400mhz bus.. still one revision behind Intel. Give us parity with Intel on this front and Apple's job of expanding marketshare will be that much easier. Flame away.</strong><hr></blockquote>
the 400Mhz bus speed is a joke... so is the 533Mhz and 1033Mhz RDRam. the BookE specification of the G5 mentiones a 500Mhz RapidIO bus speed... **** P4
the 400Mhz bus speed is a joke... so is the 533Mhz and 1033Mhz RDRam. the BookE specification of the G5 mentiones a 500Mhz RapidIO bus speed... **** P4
RapidIO is a switched connection between different functional blocks in a computer system and is not directly connected to a memory.
Next generation of a desktop PPC will have on die DDR memory controller and probably will not include L3 cashe.
The RapidIO spec. ere not a part of BookE, you can find it in rapidio.org.
500 mhz speed is one of proposed speeds, and has nothing to do with memory subsystem speed. The next embeded incarnation of Moto PPC will have a 333 DDR memory controler and 500 Mhz RapidIO interconnect implementation.
[QB]Well, I know two things for sure. First of all, I had an email cosation with Steve Jobs. Not the first, not the last one, either. Second, he told me not to worry about the processor gap because the future looked real bright. Still hasn't manifested yet, though.<hr></blockquote>
Yeah, right. You just said nothing. The future looks bright, said by Jobs, who you converse (?) with via email on a regular basis. If that's so, why do you post here?
[quote] Second, I know for a fact that Motorola started designing G7 chips before the G4 chip was even announced. Motorola can design decent chips. Their main problem has always been fabrication.<hr></blockquote>
Yeah, this is common knowledge. Any team of monkeys can design a fast CPU, but making it WORK is another story. If a design cannot be fabbed, then it is an utterly useless design.
[quote]Another thing I know for sure. I spoke with an ESD consultant who told me their fab have terrible ESD issues. Maybe one reason why they can't fab worth crap. Making an ESD station out of plexiglass and then cleaning it with a feather duster? That's just bad. Even in Austin's humid climate, that's bad.<hr></blockquote>
What does ESD stand for? How do you know that Moto employees clean fab space with feather dusters? That's funny but not every believable.
[quote]What does that mean? We have working designs. Getting someone to fab them decently is the big problem. This is why Apple needs to buy out the PowerPC assets and have AMD fab them. AMD would do a tremendous amount of work to accomodate an Apple chip since their processors have RISC backends with ISA instructions bolted onto the front. It would be a great deal for both. For some reason though, Steve is quite skittish about shacking up with AMD.<hr></blockquote>
Never going to happen. Apple will NOT buy the PPC assets, because it's too expensive to design new CPUs. Apple would be designing PPC ONLY for desktop CPUs, but Moto can share design for embedded and desktop CPUs. It's a larger market and thus less of a percentage of total revenue is spent on R&D, compared to what Apple would be forced to spend.
ESD = electro static discharge. This is bad for chips. We've heard it rumoured that Moto has dirty fabs before.
Apple wouldn't have to make/design the PPC chips if it had the license, it could sub-license. It already has a license to do this with PPC, however, due to AIM and as evidenced by the whole Exponential situation back in 95-96 or so. More likely this is the rights to AltiVec, which I suspect they part own anyhow because of the large role they played in its design.
I wouldn't dismiss chip design in quite so cavalier a fashion -- it is a very challenging discipline, and there are lots of advanced fabs out there to use if you can come up with a good design. I think Apple could do the design itself if it had core elements to start from (i.e. licensed), and experienced staff to do the work (i.e. Moto's design group from Somerset) -- and then they outsourced the production (to IBM, for example). This is the model nVidia uses quite effectively for their graphics chips.
What does ESD stand for? How do you know that Moto employees clean fab space with feather dusters?
That's funny but not every believable.</strong><hr></blockquote>
ESD stands for electrostatic discharge.
When you work with semiconductors chips, your work area, equipment, and you have to be properly grounded to protect the chips from ESD damage . And the chips themselves usually have some kind of ESD protection built into them.
Regarding Motorla's fab's, I met someone once who worked for a Motorola fab as a process engineer and he told me that their fabs are (and I'm putting this mildy) not as well run as they should be.
RapidIO is a switched connection between different functional blocks in a computer system and is not directly connected to a memory.
Next generation of a desktop PPC will have on die DDR memory controller and probably will not include L3 cashe.
The RapidIO spec. ere not a part of BookE, you can find it in rapidio.org.
500 mhz speed is one of proposed speeds, and has nothing to do with memory subsystem speed. The next embeded incarnation of Moto PPC will have a 333 DDR memory controler and 500 Mhz RapidIO interconnect implementation.
Rooster</strong><hr></blockquote>
yes i saw a paper about the specification of the 8540 - there you can find that the 500Mhz rapidIO will be implemented - i think it will be in the G5 too. i messed this paper up with book e spec. - sorry. i know that the 500Mhz is not the memory bus. the memory controller/bus can be whatever apple wants. i heard same thing (333Mhz) ...
Considering the new XServer, it would seem that G5 processors are not even close to being ready. Would Apple introduce a new rackmount server with a G4 lacking a DDR frontside bus, only to announce Powermac G5s at MWNY with 500 MHz system buses?
Not a chance, I say.
Even improved G4s are beginning to seem unlikely. The new rackmount's muthaboard suggests that even if Powermacs get DDR, it will not communicate with the G4 processor any faster than PC 133 RAM....after all if G4s with DDR support are going to be ready by MWNY, then why not use them in the rackmounts?
What a sad, sad year for Apple. I believe 2002 will be remembered as the year that Apple fell hopelessly behind Wintels in terms of hardware performance, and Apple probably will never catch up before going under. A tragic end to such a brilliant computer company...and to think that with OS X and Apple's current software, they should be in their PRIME! But no, motorola must rob Apple of any chance for success.
Maybe we should remember that the PiV is already selling with its 533MHZ bus and the RDRAM, while the G5 is only in our dream and the G4 still has a 133FSB... <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
Considering the new XServer, it would seem that G5 processors are not even close to being ready. Would Apple introduce a new rackmount server with a G4 lacking a DDR frontside bus, only to announce Powermac G5s at MWNY with 500 MHz system buses?
Not a chance, I say.
</strong>
<hr></blockquote>
Totally agree
[quote]<strong>
Even improved G4s are beginning to seem unlikely. The new rackmount's muthaboard suggests that even if Powermacs get DDR, it will not communicate with the G4 processor any faster than PC 133 RAM....after all if G4s with DDR support are going to be ready by MWNY, then why not use them in the rackmounts?
</strong><hr></blockquote>
This is where I think your reasoning is wrong. There are very good reasons for using the current G4 and it relates to the needs of the Xscale:
The current G4 is proven, people in the Mac world have confidence in its correctness. It is also the single most complex item in the box. With the exception of the custom ASIC everything in this box is an industry standard OR has appeared in at least 1 generation of PowerMac. By minimising the number of changing variables you minimise the number of things that can go wrong, and using a new processor is a big thing to change. Better to field test the chip and assorted systems on desktops first!
[quote]<strong>
What a sad, sad year for Apple. I believe 2002 will be remembered as the year that Apple fell hopelessly behind Wintels in terms of hardware performance, and Apple probably will never catch up before going under. A tragic end to such a brilliant computer company...and to think that with OS X and Apple's current software, they should be in their PRIME! But no, motorola must rob Apple of any chance for success.
</strong><hr></blockquote>
Well, this is too dramatic! Apple has done much more right than wrong this year.
It could also be a positive sign (although it's a bit of a stretch). Apple might be moving towards standardizing on DDR Ram BECAUSE they have a new chip coming that requires it.
"What a sad, sad year for Apple. I believe 2002 will be remembered as the year that Apple fell hopelessly behind Wintels in terms of hardware performance, and Apple probably will never catch up before going under. A tragic end to such a brilliant computer company...and to think that with OS X and Apple's current software, they should be in their PRIME! But no, motorola must rob Apple of any chance for success."
No, I like it. I think it has a melodramatic pathos about it.
people have gotten so much into the attitude of "wait for the G5" that i dont think PM sales will recover until they use G5 or maybe quad-high performance G4 with a much much updated motherboard. At least i know i aint buying anything until that happens. Then again apple will never go under, even if their hardware bites the dust. They have too much going for them in the software house. If os X were to go down, i would go back to snail mail, writing on paper, and board games
Comments
Right, and also very important fact, that the old friend of Steve the ex general of Moto semiconductor division Mr. HECTOR DE RUIZ will soon take place as a CEO at AMD.
Moto should forget all customers and cca. 70 million of sold CPU per year, get rid of PPC architecture and forget the future.
With this move all Moto haters will be satisfied.
regards
<img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
You'd need a few land fills...
Lemon Bon Bon
<strong>Anyone else notice that the new P4 has a 533Mhz bus, 1066Mhz RDRAM, and is expected to scale to 3Ghz in the 4th quarter.... Why fight this fight when AMD and Intel are clearly winning with no hope in sight from Motorola? Even if we get an upgraded G4/G5 at MWNY, maybe we will see a 400mhz bus.. still one revision behind Intel. Give us parity with Intel on this front and Apple's job of expanding marketshare will be that much easier. Flame away.</strong><hr></blockquote>
the 400Mhz bus speed is a joke... so is the 533Mhz and 1033Mhz RDRam. the BookE specification of the G5 mentiones a 500Mhz RapidIO bus speed... **** P4
<img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
<strong>
the 400Mhz bus speed is a joke... so is the 533Mhz and 1033Mhz RDRam. the BookE specification of the G5 mentiones a 500Mhz RapidIO bus speed... **** P4
<img src="graemlins/smokin.gif" border="0" alt="[Chilling]" /> </strong><hr></blockquote>
RapidIO is a switched connection between different functional blocks in a computer system and is not directly connected to a memory.
Next generation of a desktop PPC will have on die DDR memory controller and probably will not include L3 cashe.
The RapidIO spec. ere not a part of BookE, you can find it in rapidio.org.
500 mhz speed is one of proposed speeds, and has nothing to do with memory subsystem speed. The next embeded incarnation of Moto PPC will have a 333 DDR memory controler and 500 Mhz RapidIO interconnect implementation.
Rooster
Maybe but Amiga thinks there is.
Read this article...
<a href="http://www.theregus.com/content/3/24920.html"; target="_blank">http://www.theregus.com/content/3/24920.html</a>;
<strong>"There is no G5"
Maybe but Amiga thinks there is.
Read this article...
<a href="http://www.theregus.com/content/3/24920.html"; target="_blank">http://www.theregus.com/content/3/24920.html</a></strong><hr></blockquote>;
Amiga? Man I've seen the 3 Stooges run a platform better than that..... <img src="graemlins/lol.gif" border="0" alt="[Laughing]" />
TING5
[QB]Well, I know two things for sure. First of all, I had an email cosation with Steve Jobs. Not the first, not the last one, either. Second, he told me not to worry about the processor gap because the future looked real bright. Still hasn't manifested yet, though.<hr></blockquote>
Yeah, right. You just said nothing. The future looks bright, said by Jobs, who you converse (?) with via email on a regular basis. If that's so, why do you post here?
[quote] Second, I know for a fact that Motorola started designing G7 chips before the G4 chip was even announced. Motorola can design decent chips. Their main problem has always been fabrication.<hr></blockquote>
Yeah, this is common knowledge. Any team of monkeys can design a fast CPU, but making it WORK is another story. If a design cannot be fabbed, then it is an utterly useless design.
[quote]Another thing I know for sure. I spoke with an ESD consultant who told me their fab have terrible ESD issues. Maybe one reason why they can't fab worth crap. Making an ESD station out of plexiglass and then cleaning it with a feather duster? That's just bad. Even in Austin's humid climate, that's bad.<hr></blockquote>
What does ESD stand for? How do you know that Moto employees clean fab space with feather dusters? That's funny but not every believable.
[quote]What does that mean? We have working designs. Getting someone to fab them decently is the big problem. This is why Apple needs to buy out the PowerPC assets and have AMD fab them. AMD would do a tremendous amount of work to accomodate an Apple chip since their processors have RISC backends with ISA instructions bolted onto the front. It would be a great deal for both. For some reason though, Steve is quite skittish about shacking up with AMD.<hr></blockquote>
Never going to happen. Apple will NOT buy the PPC assets, because it's too expensive to design new CPUs. Apple would be designing PPC ONLY for desktop CPUs, but Moto can share design for embedded and desktop CPUs. It's a larger market and thus less of a percentage of total revenue is spent on R&D, compared to what Apple would be forced to spend.
Apple wouldn't have to make/design the PPC chips if it had the license, it could sub-license. It already has a license to do this with PPC, however, due to AIM and as evidenced by the whole Exponential situation back in 95-96 or so. More likely this is the rights to AltiVec, which I suspect they part own anyhow because of the large role they played in its design.
I wouldn't dismiss chip design in quite so cavalier a fashion -- it is a very challenging discipline, and there are lots of advanced fabs out there to use if you can come up with a good design. I think Apple could do the design itself if it had core elements to start from (i.e. licensed), and experienced staff to do the work (i.e. Moto's design group from Somerset) -- and then they outsourced the production (to IBM, for example). This is the model nVidia uses quite effectively for their graphics chips.
<strong>
What does ESD stand for? How do you know that Moto employees clean fab space with feather dusters?
That's funny but not every believable.</strong><hr></blockquote>
ESD stands for electrostatic discharge.
When you work with semiconductors chips, your work area, equipment, and you have to be properly grounded to protect the chips from ESD damage . And the chips themselves usually have some kind of ESD protection built into them.
Regarding Motorla's fab's, I met someone once who worked for a Motorola fab as a process engineer and he told me that their fabs are (and I'm putting this mildy) not as well run as they should be.
<strong>
RapidIO is a switched connection between different functional blocks in a computer system and is not directly connected to a memory.
Next generation of a desktop PPC will have on die DDR memory controller and probably will not include L3 cashe.
The RapidIO spec. ere not a part of BookE, you can find it in rapidio.org.
500 mhz speed is one of proposed speeds, and has nothing to do with memory subsystem speed. The next embeded incarnation of Moto PPC will have a 333 DDR memory controler and 500 Mhz RapidIO interconnect implementation.
Rooster</strong><hr></blockquote>
yes i saw a paper about the specification of the 8540 - there you can find that the 500Mhz rapidIO will be implemented - i think it will be in the G5 too. i messed this paper up with book e spec. - sorry. i know that the 500Mhz is not the memory bus. the memory controller/bus can be whatever apple wants. i heard same thing (333Mhz) ...
Considering the new XServer, it would seem that G5 processors are not even close to being ready. Would Apple introduce a new rackmount server with a G4 lacking a DDR frontside bus, only to announce Powermac G5s at MWNY with 500 MHz system buses?
Not a chance, I say.
Even improved G4s are beginning to seem unlikely. The new rackmount's muthaboard suggests that even if Powermacs get DDR, it will not communicate with the G4 processor any faster than PC 133 RAM....after all if G4s with DDR support are going to be ready by MWNY, then why not use them in the rackmounts?
What a sad, sad year for Apple. I believe 2002 will be remembered as the year that Apple fell hopelessly behind Wintels in terms of hardware performance, and Apple probably will never catch up before going under. A tragic end to such a brilliant computer company...and to think that with OS X and Apple's current software, they should be in their PRIME! But no, motorola must rob Apple of any chance for success.
[ 05-15-2002: Message edited by: Junkyard Dawg ]</p>
<strong>Nudge------>>
Considering the new XServer, it would seem that G5 processors are not even close to being ready. Would Apple introduce a new rackmount server with a G4 lacking a DDR frontside bus, only to announce Powermac G5s at MWNY with 500 MHz system buses?
Not a chance, I say.
</strong>
<hr></blockquote>
Totally agree
[quote]<strong>
Even improved G4s are beginning to seem unlikely. The new rackmount's muthaboard suggests that even if Powermacs get DDR, it will not communicate with the G4 processor any faster than PC 133 RAM....after all if G4s with DDR support are going to be ready by MWNY, then why not use them in the rackmounts?
</strong><hr></blockquote>
This is where I think your reasoning is wrong. There are very good reasons for using the current G4 and it relates to the needs of the Xscale:
The current G4 is proven, people in the Mac world have confidence in its correctness. It is also the single most complex item in the box. With the exception of the custom ASIC everything in this box is an industry standard OR has appeared in at least 1 generation of PowerMac. By minimising the number of changing variables you minimise the number of things that can go wrong, and using a new processor is a big thing to change. Better to field test the chip and assorted systems on desktops first!
[quote]<strong>
What a sad, sad year for Apple. I believe 2002 will be remembered as the year that Apple fell hopelessly behind Wintels in terms of hardware performance, and Apple probably will never catch up before going under. A tragic end to such a brilliant computer company...and to think that with OS X and Apple's current software, they should be in their PRIME! But no, motorola must rob Apple of any chance for success.
</strong><hr></blockquote>
Well, this is too dramatic! Apple has done much more right than wrong this year.
No, I like it. I think it has a melodramatic pathos about it.
Lemon Bon Bon